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Methods and apparatus for forming ultra-shallow doped regions using doped silicon oxide films 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C23C-016/00
출원번호 US-0409763 (1999-09-30)
발명자 / 주소
  • Yieh Ellie
  • Xia Li-Qun
  • Gee Paul
  • Nguyen Bang
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Townsend and Townsend & Crew
인용정보 피인용 횟수 : 30  인용 특허 : 12

초록

The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce to

대표청구항

[ What is claimed is:] [1.] A substrate processing system comprising:a processing chamber;a gas delivery system configured to deliver a first process gas to said processing chamber;a heating system, said heating system including a heater capable of holding a wafer and capable of heating to a selecte

이 특허에 인용된 특허 (12)

  1. Lee Peter W. (Fremont CA) Wang David N. K. (Saratogo CA) Nagashima Makoto (Machida JPX) Fukuma Kazuto (Osaka JPX) Sato Tetsuya (Narita JPX), Boron phosphorus silicate glass composite layer on semiconductor wafer.
  2. Wang David N. (Cupertino CA) White John M. (Hayward CA) Law Kam S. (Union City CA) Leung Cissy (Union City CA) Umotoy Salvador P. (Pittsburg CA) Collins Kenneth S. (San Jose CA) Adamik John A. (San R, CVD of silicon oxide using TEOS decomposition and in-situ planarization process.
  3. Hsu Ching-Hsiang (Hsin-Chu TWX) Liang Mong-Song (Hsin-Chu TWX), Elevated source/drain with solid phase diffused source/drain extension for deep sub-micron mosfets.
  4. Yamazaki Shunpei (Tokyo JPX), Field effect semiconductor device with immunity to hot carrier effects.
  5. Allman Derryl D. J. (Colorado Springs CO) Kwong Dim-Lee (Austin TX), Method for forming a bipolar transistor using doped SOG.
  6. Becker Frank S. (Munich DEX) Pawlik Dieter (Groebenzell DEX), Method for the manufacture of silicon oxide layers doped with boron and phosphorus.
  7. Matsumoto Shigeyuki (Atsugi JPX) Saito Asao (Yokohama JPX) Naruse Yashiro (Kiyokawa-mura JPX) Fujita Kei (Kokubunji JPX), Method of forming an ink jet recording device, and head using same.
  8. Allman Derryl D. J. (Colorado Springs CO) Kwong Dim-Lee (Austin TX), Method of making a shallow junction by using first and second SOG layers.
  9. Cho Byung J. (Kyungki-Do KRX), Method of manufacturing a semiconductor device.
  10. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
  11. Thomas Ian M. (Temperance MI) Tillman James J. (Toledo OH), Process for forming a doped oxide film and composite article.
  12. Allman Derryl D. J. (Colorado Springs CO) Miller Gayle W. (Colorado Springs CO), Selective sidewall diffusion process using doped SOG.

이 특허를 인용한 특허 (30)

  1. Dian Sugiarto ; Judy Huang ; David Cheung, Apparatus for depositing high deposition rate halogen-doped silicon oxide layer.
  2. Seok-jun Won KR; Young-wook Park KR; Yong-woo Hyung KR, Apparatus for forming a film on a substrate.
  3. Spear, Richard A.; Rutter, Jr., Edward W.; Metin, Lea M.; Xu, Helen X., Borate esters, boron-comprising dopants, and methods of fabricating boron-comprising dopants.
  4. Leung, Roger Yu-Kwan; Zhou, De-Ling; Fan, Wenya, Boron-comprising inks for forming boron-doped regions in semiconductor substrates using non-contact printing processes and methods for fabricating such boron-comprising inks.
  5. Leung, Roger Yu-Kwan; Fan, Wenya; Nedbal, Jan, Compositions for forming doped regions in semiconductor substrates, methods for fabricating such compositions, and methods for forming doped regions using such compositions.
  6. Pan,Rong; Ton,Van Q., Deposition of thick BPSG layers as upper and lower cladding for optoelectronics applications.
  7. Chen, Chia-Lin; Lee, Tze Liang; Chen, Shih-Chang, Device performance improvement by heavily doped pre-gate and post polysilicon gate clean.
  8. Zhou, Ligui; Spear, Richard A.; Leung, Roger Yu-Kwan; Fan, Wenya; Xu, Helen X.; Metin, Lea M.; Bhanap, Anil Shriram, Dopant ink compositions for forming doped regions in semiconductor substrates, and methods for fabricating dopant ink compositions.
  9. Choi, Dongwon; Lee, Dong Hyung; Poon, Tze; Vellaikal, Manoj; Porshnev, Peter; Foad, Majeed, Enhanced scavenging of residual fluorine radicals using silicon coating on process chamber walls.
  10. Ingle,Nitin K.; Wong,Shan; Xia,Xinyun; Banthia,Vikash; Bang,Won B.; Wang,Yen Kun V.; Yuan,Zheng, Gap-fill depositions in the formation of silicon containing dielectric materials.
  11. Yuan,Zheng; Venkataraman,Shankar; Ching,Cary; Wong,Shang; Mukai,Kevin Mikio; Ingle,Nitin K., Limited thermal budget formation of PMD layers.
  12. Hong, Sukwon; Tran, Toan; Mallick, Abhijit; Liang, Jingmei; Ingle, Nitin K., Low shrinkage dielectric films.
  13. Mukai, Kevin; Chandran, Shankar, Method and apparatus for controlling dopant concentration during BPSG film deposition to reduce nitride consumption.
  14. Won,Seok jun; Park,Young wook; Hyung,Yong woo, Method for forming a thin film.
  15. Lee, Joon Hyeon, Method for forming isolation film for semiconductor devices.
  16. Clark, Robert D, Method for forming ultra-shallow boron doping regions by solid phase diffusion.
  17. Clark, Robert D., Method for forming ultra-shallow boron doping regions by solid phase diffusion.
  18. Clark, Robert D., Method for forming ultra-shallow doping regions by solid phase diffusion.
  19. Clark, Robert D., Method for forming ultra-shallow doping regions by solid phase diffusion.
  20. Consiglio, Steven P.; Clark, Robert D.; O'Meara, David L., Method of controlling solid phase diffusion of boron dopants to form ultra-shallow doping regions.
  21. Ni, Chyi-Tsong; Su, Eric, Method to produce porous oxide including forming a precoating oxide and a thermal oxide.
  22. Ingle,Nitin K.; Xia,Xinyua; Yuan,Zheng, Method using TEOS ramp-up during TEOS/ozone CVD for improved gap-fill.
  23. Li-Qun Xia ; Ellie Yieh ; Srinivas Nemani, Methods and apparatus for depositing premetal dielectric layer at sub-atmospheric and high temperature conditions.
  24. Ellie Yieh ; Li-Qun Xia ; Srinivas Nemani, Methods and apparatus for shallow trench isolation.
  25. Ingle, Nitin K.; Yuan, Zheng; Banthia, Vikash; Xia, Xinyun; Forstner, Hali J. L.; Pan, Rong, Multi-step anneal of thin films for film densification and improved gap-fill.
  26. Yuan, Zheng; Arghavani, Reza; Venkataraman, Shankar, Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill.
  27. Huang, Hong Min; Gao, Carol; Ding, Zhe; Peng, Albert; Liu, Ya Qun, Phosphorous-comprising dopants and methods for forming phosphorous-doped regions in semiconductor substrates using phosphorous-comprising dopants.
  28. Sexton, Greg, Plasma processing assemblies including hinge assemblies.
  29. Watanabe, Yukimune, Semiconductor substrate and method for producing semiconductor substrate.
  30. Chen, Chia-Lin; Lee, Tze-Liang; Chen, Shih-Chang, Semiconductor wafer manufacturing methods employing cleaning delay period.
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