초록 ▼

Semiconductor materials optimized for their electrical conductivity and thermal conductivity promise much higher thermoelectric cooling power. The materials can achieve the same cooling or power generation capacity in thermopiles with less electron current compared with present bulk materials. Becau

Semiconductor materials optimized for their electrical conductivity and thermal conductivity promise much higher thermoelectric cooling power. The materials can achieve the same cooling or power generation capacity in thermopiles with less electron current compared with present bulk materials. Because less electron current is required to accomplish the same task, total thermopile semiconductor material cross-sectional area normal to thermal and electron flow is greatly reduced and the element length-to-cross-sectional area aspect ratio is increased. The net result is a significant improvement in the figure of merit, ZT, and in the device Coefficient of Performance(COP).

대표청구항 ▼

[ We claim:] [1.] A method for fabricating a thermopile slice, comprising the steps of:(a) bonding a thin film semiconductor sheet having either an n-type or a p-type semiconductor to a substrate containing power distribution circuitry;(b) stacking and bonding semiconductor sheet-substrate pairs to

[ We claim:] [1.] A method for fabricating a thermopile slice, comprising the steps of:(a) bonding a thin film semiconductor sheet having either an n-type or a p-type semiconductor to a substrate containing power distribution circuitry;(b) stacking and bonding semiconductor sheet-substrate pairs to form a stack having alternating sheets of an n-type and then a p-type semiconductor;(c) slicing the stack to form a film having alternating strips of an n-type semiconductor and a p-type semiconductor, the strips being separated by the substrate;(d) bonding the slices from step (c) to a thermally insulative spacer material;(e) stacking and bonding the slice-spacer pairs from step (c) to form a block; and(f) slicing the block of slice-spacer pairs to form a thermopile slice having an array of thin film semiconductor material separated by spacer materials in a generally checker board arrangement of n-type or p-type islands generally as shown in FIG. 1.