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특허 상세정보

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Surface-mount device package having an integral passive component

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H01L-023/522    H01L-023/532   
미국특허분류(USC) 36/1768 ; 36/176.5 ; 36/176.6 ; 36/176.7 ; 36/177.2 ; 36/178.2 ; 36/178.3 ; 25/778.0 ; 25/753.3 ; 25/753.6 ; 25/753.7 ; 17/425.5 ; 33/833.0 ; 33/833.1 ; 33/833.3
출원번호 US-0092637 (1998-06-05)
발명자 / 주소
  • Lach Lawrence E.
  • Dunn Gregory J.
  • Gamota Daniel R.
출원인 / 주소
  • Motorola, Inc.
인용정보 피인용 횟수 : 59  인용 특허 : 5
초록
▼

The surface-mount device package comprises a pad located on a face of the surface-mount device, a solder bump bonded to the pad, and a terminal spaced radially apart from the pad. A terminal surrounds the pad in at least one common plane that bisects the pad and the terminal. An electrically resistive volume intervenes between the pad and the terminal. The pad is electrically coupled to the terminal through the resistive volume. The terminal, the pad, and the electrically resistive volume cooperate to form a passive component associated with at least one...

대표
청구항
▼

[ What is claimed is:] [1.] A surface-mount device having internal and external electrical interconnections, the device comprising:a pad located on a face of the surface-mount device, the pad being a component of one of the internal and external electrical connections;a solder bump bonded to the pad;a terminal located on the face and surrounding the pad so as to be spaced radially apart from the pad; andan electrically-resistive volume intervening between the pad and the terminal, the pad being electrically coupled to the terminal through the electricall...

이 특허에 인용된 특허 (5)

  1. Howard James R. (Santa Clara CA) Lucas Gregory L. (Newark CA) Bryan Scott K. (San Jose CA) Choe Jin S. (San Jose CA) Biunno Nicholas (Santa Clara CA), Annular circuit components coupled with printed circuit board through-hole.
  2. Howard James R. (Santa Clara CA) Lucas Gregory L. (Newark CA) Bryan Scott K. (San Jose CA) Choe Jin S. (San Jose CA), Annular resistor coupled with printed circuit board through-hole.
  3. Ruby Richard C. (Menlo Park CA) Chao Clinton (Redwood City CA), Chip carrier.
  4. Henderson James M. (Scottsdale AZ) Kielmeyer ; Jr. Ronald F. (Chandler AZ), Method of forming and connecting a resistive layer on a pc board.
  5. Dunn Gregory J. ; Lach Lawrence E. ; Gamota Daniel R., Solderable pad with integral series termination resistor.

이 특허를 인용한 특허 (59)

  1. Chen, Kong-Chen, Apparatus and method for vertically-structured passive components.
  2. Jacobsen, Jeffrey Jay, Apparatuses and methods for forming wireless RF labels.
  3. Bhakta, Jayesh R.; Pauley, Jr., Robert S., Arrangement of integrated circuits in a memory module.
  4. Shirai, Hiroshi; Kubo, Akira, Ball grid array connector.
  5. Ernsberger, Craig; Ginn, Steven N., Ball grid array resistor capacitor network.
  6. Langhorn,Jason; Ernsberger,Craig, Ball grid array resistor capacitor network.
  7. Ernsberger, Craig; Langhorn, Jason B.; Tu, Yinggang, Ball grid array resistor network.
  8. Christian, Cynthia A.; Cooper, Richard; Tu, Yinggang, Ball grid array resistor network having a ground plane.
  9. Cooper, Richard; Tu, Yinggang; Christian, legal representative, Cynthia A., Ball grid array resistor network having a ground plane.
  10. Yue,Cheisan J.; Keyser,Thomas, Bonded thin-film structures for optical modulators and methods of manufacture.
  11. Zhao Bin, Bonding pad and support structure and method for their fabrication.
  12. Powers, Dirk, Circuit board system with raised interconnects of conductive circuit traces.
  13. Hossain, M D Altaf; Zhao, Jin; Vu, John T., Circuit board with integrated passive devices.
  14. Auburger, Albert; Stadler, Bernd; Paulus, Stefan; Theuss, Horst, Electronic device having a trimming possibility and at least one semiconductor chip and method for producing the electronic device.
  15. Hashimoto, Nobuaki, Electronic substrate.
  16. Hashimoto, Nobuaki, Electronic substrate.
  17. He,Jiangqi; Sun,Ping; Kim,Hyunjun; Zeng,Xiang Yin, Extended thin film capacitor (TFC).
  18. He,Jiangqi; Sun,Ping; Kim,Hyunjun; Zeng,Xiang Yin, Extended thin film capacitor (TFC).
  19. Gillingham, Peter B.; Millar, Bruce, High bandwidth memory interface.
  20. Tang, John J.; Zeng, Xiang Yin; He, Jiangqi; Hai, Ding, Integrated capacitors in package-level structures, processes of making same, and systems containing same.
  21. Tang, John J.; Zeng, Xiang Yin; He, Jiangqi; Hai, Ding, Integrated capacitors in package-level structures, processes of making same, and systems containing same.
  22. Matsuo, Mie; Hayasaka, Nobuo; Matsunaga, Noriaki; Okumura, Katsuya, Integrated circuit device and method of manufacturing the same.
  23. Keyser, Thomas; Sanders, Glen A.; Hughes, Grenville; Strandjord, Lee K., Integrated optical rotation sensor and method for sensing rotation rate.
  24. Keyser,Thomas; Yue,Cheisan J., Low loss contact structures for silicon based optical modulators and methods of manufacture.
  25. Petersen, Ryan M.; Schuette, Franz Michael, Memory module having on-package or on-module termination.
  26. Schott, Donald E.; Grieder, Andrew; Groshong, Joseph P., Method and apparatus for high electrical and thermal performance ball grid array package.
  27. Schmitz,Gerd, Method for producing a large-mass ohmic resistor for protecting electronic assemblies from surges, and an electronic assembly.
  28. Ahn, Kie Y.; Forbes, Leonard, Method of making a chip packaging device having an interposer.
  29. Clevenger, Lawrence A.; Hsu, Louis L.; Radens, Carl J.; Wang, Li-Kong; Wong, Kwong Hon, Method to fabricate passive components using conductive polymer.
  30. Clevenger,Lawrence A.; Hsu,Louis L.; Radens,Carl J.; Wang,Li Kong; Wong,Kwong Hon, Method to fabricate passive components using conductive polymer.
  31. Kuechenmeister, Frank; Lehmann, Lothar; Platz, Alexander; Jungnickel, Gotthard; Kosgalwies, Sven, Methods of forming bump structures that include a protection layer.
  32. Pflughaupt,L. Elliott; Gibson,David; Kim,Young Gon; Mitchell,Craig S.; Zohni,Wael; Mohammed,Ilyas, Microelectronic assembly having array including passive elements and interconnects.
  33. Sakai, Norio; Kato, Isao; Isebo, Kazuhiro, Monolithic ceramic electronic component, method for manufacturing the same, and electronic device.
  34. Kondo, Kenji; Aoyama, Masayuki; Kondo, Koji; Takemoto, Masanori, Mounting structure of electronic component on substrate board.
  35. Keyser,Thomas; Hughes,Grenville, Optical coupling structure.
  36. Sanders,Glen A.; Hughes,Grenville; Keyser,Thomas; Strandjord,Lee K., Optical gyro with free space resonator and method for sensing inertial rotation rate.
  37. Hughes,Grenville; Sanders,Glen A.; Strandjord,Lee K., Optical resonator gyro with integrated external cavity beam generator.
  38. Master, Raj N.; Khan, Mohammad Zubair; Guardado, Maria; Anderson, Charles, Organic packages having low tin solder connections.
  39. Matsuo, Mie; Hayasaka, Nobuo; Matsunaga, Noriaki; Okumura, Katsuya, Passive semiconductor device mounted as daughter chip on active semiconductor device.
  40. Tahara, Iwao; Mihara, Ichiro; Aoki, Yutaka, Semiconductor device.
  41. Aoki, Yutaki; Mihara, Ichiro; Wakabayashi, Takeshi; Watanabe, Katsumi, Semiconductor device having a barrier layer.
  42. Aoki, Yutaka; Mihara, Ichiro; Wakabayashi, Takeshi; Watanabe, Katsumi, Semiconductor device having a thin-film circuit element provided above an integrated circuit.
  43. Aoki, Yutaka; Mihara, Ichiro; Wakabayashi, Takeshi; Watanabe, Katsumi, Semiconductor device having a thin-film circuit element provided above an integrated circuit.
  44. Iijima,Takahiro; Rokugawa,Akio, Semiconductor device package and method of production and semiconductor device of same.
  45. Lai,Zao Kuo; Wong,Lin Yin, Semiconductor package substrate with embedded resistors and method for fabricating same.
  46. Lai,Zao Kuo; Wong,Lin Yin, Semiconductor package substrate with embedded resistors and method for fabricating the same.
  47. Ahn Kie Y. ; Forbes Leonard, Silicon multi-chip module packaging with integrated passive components and method of making.
  48. Keyser, Thomas R., Silicon optical device.
  49. Keyser,Thomas; Yue,Cheisan J.; Larsen,Bradley J., Silicon-insulator-silicon thin-film structures for optical modulators and methods of manufacture.
  50. Clevenger, Lawrence A.; Hsu, Louis L.; Radens, Carl J.; Wang, Li-Kong; Wong, Kwong Hon, Structure and method for shadow mask electrode.
  51. Ching-Cheng Huang TW; Mou-Shiung Lin TW; Jin-Yuan Lee TW, Structure of ceramic package with integrated passive devices.
  52. Tsai, Ying-Chou; Pu, Han-Ping; Chiu, Shih-Kuang, Substrate structure of flip chip package.
  53. Murtagian, Gregorio R.; Sankman, Robert L.; Stone, Brent S.; Radhakrishnan, Kaladhar; Heppner, Joshua D., Surface-mount inductor structures for forming one or more inductors with substrate traces.
  54. Yu,Lianzhong; Yang,Ken L.; Keyser,Thomas, System and method for uniform multi-plane silicon oxide layer formation for optical applications.
  55. Yang,Zhiping; Arumugham,Vinayagam; Dang,Lekhanh, Techniques for manufacturing a circuit board with an improved layout for decoupling capacitors.
  56. Yang,Zhiping; Arumugham,Vinayagam; Dang,Lekhanh, Techniques for manufacturing a circuit board with an improved layout for decoupling capacitors.
  57. Wee, Boon Hee; Yap, Thean Loy; Tan, Seok Hiong, Test contact mechanism.
  58. Clevenger, Lawrence A.; Hsu, Louis L.; Radens, Carl J.; Wang, Li-Kong; Wong, Kwong Hon, Three-dimensional island pixel photo-sensor.
  59. Oda,Takashi; Miyake,Yasufumi; Ohkawa,Tadao, Wired circuit board.

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