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Adaptive expansion table in a digital telephone receiver 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04M-001/24
출원번호 US-0867259 (1997-06-02)
발명자 / 주소
  • Hughes-Hartogs Dirk
출원인 / 주소
  • Canon Kabushiki Kaisha, JPX
대리인 / 주소
    Fenwick & West LLP
인용정보 피인용 횟수 : 48  인용 특허 : 21

초록

A digital telephone (60) comprises send equipment (40) and receive equipment (50), coupled via a signal splitter/combiner (61) onto a digital telephone line (62) for communication with a remote party (90). The send equipment (40) comprises an A-law map (12) and a mu-law map (43). Receive equipment (

대표청구항

[ What is claimed is:] [14.] A method for a telephone end user to overcome incompatibility between a first telephone system using A-law and a second telephone system using mu-law when said telephone end user communicates with a remote party, connected to a telephone system other than the system of t

이 특허에 인용된 특허 (21)

  1. Haughton Lance J. (East Orange NJ) Yon Inchol (Little Ferry NJ), Automatic loss control circuit.
  2. Chace Artner B. (Granby MA), Conference telephone system and method.
  3. Van Gerwen Petrus J. (Eindhoven NLX) van de Laar Franciscus A. M. (Eindhoven NLX) Kotmans Hendrik J. (Eindhoven NLX), Digital echo canceller.
  4. Morrow Stephen E. (5089 Cineraria Ct. San Jose CA 95111) Osterlund Karl F. (6266 Bancroft Way San Jose CA 95129) Rosen Lawrence E. (3739 Florence St. Redwood City CA 94063) Thirion Philippe (85 route, Digital modem.
  5. Leung Tommy Y. (Cassopolis MI) Waldron Mark A. (Elkhart IN), Digital signal processor modem.
  6. Takahashi Atsuhisa (Kawasaki JPX) Nara Takashi (Yokohama JPX) Murayama Masami (Yokohama JPX) Takeichi Hiroaki (Yokohama JPX), Digital switch module having encoding law conversion capability.
  7. Feiner Alexander (Rumson NJ) Saltzberg Burton R. (Middletown NJ), Facility type determination technique.
  8. Kagami Naoto (Yokohama JPX), Facsimile apparatus.
  9. Hsing To R. (Sudbury MA), Framed digital voice summing for teleconferencing.
  10. Arbel Ygal (Sunnyvale CA), Full-duplex digital speakerphone.
  11. McAuliffe Robert E. (Loveland CO) Cain Christopher B. (Longmont CO) Siefers John E. (Ft. Collins CO), General purpose, reconfigurable system for processing serial bit streams.
  12. Kattemalalavadi Shrikanth S. (San Jose CA) Williams Charles S. T. (Palo Alto CA), Integrated PCM level control and conversion using a lookup table.
  13. Delmege James W. (North Chili NY) Day David J. (Victor NY), Key telephone system providing selection of key or PBX operational modes.
  14. Sugiyama Akira (Kawasaki JPX), Multi-media communication device.
  15. Betts William L. (St. Petersburg FL) Saltzberg Burton R. (Middletown NJ), Non-linear encoder and decoder for information transmission through non-linear channels.
  16. Huffman Charles E. (Plano TX) Southerland Stephen R. (Plano TX), PCM data translating apparatus.
  17. Bowker Duane O. (Neptune City) Ganley John T. (Milford) James J. H. (Farmingdale NJ), Telephone network speech signal enhancement.
  18. Morita Takashi (Yokohama JPX) Hirai Koji (Yokohama JPX) Kusaba Akira (Yokohama JPX), Time division exchange system having functions of compressing and expanding information.
  19. Breidenstein Charles J. (Rochester NY) Caplan Jerome S. (Henrietta NY) Gueldenpfennig Klaus (Penfield NY), Time division multiplex switching system for interconnecting telephone circuits which operate in accordance with differe.
  20. Steele Raymond (Hazlet NJ) Wong Wai C. (Aberdeen NJ) Xydeas Costas S. (Loughborough GB2), Transmitting data on the phase of speech.
  21. Leslie Ian M. (The Malthouse ; Commerical End ; Swaffham Bulbeck Cambridge GBX) Burren John W. (18 Norman Avenue Abingdon Oxon OX14 2HQ GBX) Pitura Henry (26 Columbia Drive Leighton Buzzard ; Bedford, Variable data rate channel for digital network.

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  2. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  3. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  4. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  5. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  6. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  7. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  8. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogenous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  9. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive processor for performing an operation with simple and complex units each comprising configurably interconnected heterogeneous elements.
  10. Master, Paul L.; Uvacek, Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  11. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  12. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  13. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  14. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having fixed, application specific computational elements.
  15. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements.
  16. Heidari, Ghobad; Chang, Kuor Hsin; Master, Paul L.; Hogenauer, Eugene B.; Scheuermann, Walter James, Communications module, device, and method for implementing a system acquisition function.
  17. Master, Paul L.; Watson, John, Configurable hardware based digital imaging apparatus.
  18. Scheuermann, W. James; Hogenauer, Eugene B., Control node for multi-core system.
  19. Furtek, Frederick Curtis; Master, Paul L., External memory controller.
  20. Furtek, Frederick Curtis; Master, Paul L., External memory controller node.
  21. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
  22. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
  23. Scheuermann,Walter James, Hardware implementation of the secure hash standard.
  24. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  25. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  26. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  27. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  28. Burroughs,William G.; Pollock,Steven J., Inter-DSP signaling in a multiple DSP environment.
  29. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  30. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  31. Sambhwani,Sharad; Heidari,Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  32. Master, Paul L., Method and system for achieving individualized protected space in an operating system.
  33. Master, Paul L., Method and system for creating and programming an adaptive computing engine.
  34. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  35. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  36. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  37. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  38. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  39. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  40. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  41. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  42. Master,Paul L.; Hogenauer,Eugene; Wu,Bicheng William; Chuang,Dan MingLun; Freeman Benson,Bjorn, Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information.
  43. Master, Paul L., Profiling of software and circuit designs utilizing data operation analyses.
  44. Master,Paul L.; Watson,John, Storage and delivery of device features.
  45. Beyda, William J.; Shaffer, Shmuel, System and method for improving conversion between A-law and U-law coding.
  46. Master, Paul L.; Watson, John, System for adapting device standards after manufacture.
  47. Master, Paul L.; Watson, John, System for authorizing functionality in adaptable hardware devices.
  48. Katragadda, Ramana; Spoltore, Paul; Howard, Ric, Task definition for specifying resource requirements.
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