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Method for encasing array packages

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B29C-070/70
  • B29C-070/74
출원번호 US-0019226 (1998-02-05)
발명자 / 주소
  • Thummel Steven G.
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    Trask, Britt & Rossa
인용정보 피인용 횟수 : 98  인용 특허 : 20

초록

The upper and lower mold plates of a transfer molding machine are configured for one-side encapsulation of a pair of substrate mounted electronic devices having an opposite conductor-grid-array and/or bare heat sink/dissipator. The pair of devices is positioned back-to-back within a single mold cavi

대표청구항

[ What is claimed is:] [1.] A method for encapsulation of a plurality of electronic devices within a mold cavity, each electronic device having at least one electronic component mounted on a first side of a substrate, said method comprising:providing at least one electronic component on a first side

이 특허에 인용된 특허 (20)

  1. Weber Patrick O. (San Jose CA), Apparatus for encapsulating electronic packages.
  2. Yoneda Yoshihiro (Kawasaki JPX) Ozawa Takashi (Kawasaki JPX), BGA semiconductor device including a plurality of semiconductor chips located on upper and lower surfaces of a first sub.
  3. Pennisi Robert W. (Boca Raton FL) Gold Glenn E. (Coconut Creek FL) Juskey Frank J. (Coral Springs FL) Urbish Glenn F. (Coral Springs FL), Encapsulated electronic package.
  4. Yonehara Takao,JPX, Method for bonding semiconductor substrates.
  5. Casto James J. (Austin TX), Method for fabricating a multichip semiconductor device having two interdigitated leadframes.
  6. Lin Paul T. (Austin TX), Method for fabricating multiple electronic devices within a single carrier structure.
  7. Manzione Louis T. (Summit NJ) Weld John D. (Succasunna NJ), Method of encapsulating large substrate devices using reservoir cavities for balanced mold filling.
  8. Primeaux William F. (Austin TX), Molded plastic package with wire protection.
  9. Weber Patrick O. (San Jose CA), Multi-tier laminate substrate with internal heat spreader.
  10. Bhattacharyya Bidyut (Chandler AZ) Mallik Debendra (Chandler AZ), Multilayer molded plastic package using mesic technology.
  11. Nuyen Linh T. (Paris FRX), Multispectral photovoltaic component comprising a stack of cells, and method of manufacture.
  12. Degani Yinon (Highland Park NJ) Dudderar Thomas D. (Chatham NJ) Han Byung J. (Scotch Plains NJ) Lyons Alan M. (New Providence NJ) Tai King L. (Berkeley Heights NJ), Packaging multi-chip modules without wire-bond interconnection.
  13. Tanaka Sueyoshi (Fukuoka JPX) Sakakibara Zyunzi (Fukuoka JPX) Tsutsumi Yasutsugu (Fukuoka JPX), Plastic molding apparatus.
  14. Wakefield Gene F. (Plano TX), Plastic packaging of microelectronic circuit devices.
  15. Hosokawa Ryuji (Yokohama JPX) Yanagida Satoru (Kawasaki JPX), Process of folding a strip leadframe to superpose two leadframes in a plural semiconductor die encapsulated package.
  16. Sota Yoshiki (Tenri JPX), Resin sealing type semiconductor device having fixed inner leads.
  17. Marchisi Giuseppe (Milan ITX), Semiconductor device package with dies mounted on both sides of the central pad of a metal frame.
  18. Acello Salvature J. ; Ansinn Detlev D. ; Scott Robert J., Semiconductor device soldering process.
  19. Maslakow William H. (Lewisville TX), Thermoplastic semiconductor package and method of producing it.
  20. Lin Paul T. (Austin TX), Three-dimensional multi-chip pad array carrier.

이 특허를 인용한 특허 (98)

  1. Thummel, Steven G., Apparatus for encasing array packages.
  2. Thummel, Steven G., Apparatus for encasing array packages.
  3. Rumsey, Brad D.; Bolken, Todd O.; Baerlocher, Cary J., Apparatus for reduced flash encapsulation of microelectronic devices.
  4. Clyne, Craig T.; Fernandez, John C., Die attached to a support member by a plurality of adhesive members.
  5. Mess, Leonard E., Encapsulation method in a molding machine for an electronic device.
  6. Jang, Ki Youn; Song, Sungmin; Bae, JoHyun, Integrated circuit package system employing mold flash prevention technology.
  7. Kuan, Heap Hoe; Chua, Pei Ee; Chow, Seng Guan, Integrated circuit package system employing resilient member mold system technology.
  8. Ahmad,Syed Sajid, Interconnecting substrates for electrical coupling of microelectronic components.
  9. Ahmad,Syed Sajid, Interconnecting substrates for electrical coupling of microelectronic components.
  10. Seng,Eric Tan Swee; Chye,Lim Thiam, Invertible microfeature device packages.
  11. Seng,Eric Tan Swee; Lim,Thiam Chye, Invertible microfeature device packages.
  12. Jiang, Tongbi, Method and apparatus for attaching microelectronic substrates and support members.
  13. Jiang,Tongbi, Method and apparatus for attaching microelectronic substrates and support members.
  14. Jiang,Tongbi, Method and apparatus for attaching microelectronic substrates and support members.
  15. Savaria, Albert M., Method and apparatus for dispensing adhesive on microelectronic substrate supports.
  16. Lee, Kian Chai; Tim, Teoh Bee Yong; M, Vijendran; Choong, Lien Wah, Method and apparatus for distributing mold material in a mold for packaging microelectronic devices.
  17. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
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  19. Bolken, Todd O., Method and apparatus for packaging a microelectronic die.
  20. Rumsey, Brad D.; Bolken, Todd O.; Baerlocher, Cary J., Method and apparatus for reduced flash encapsulation of microelectronic devices.
  21. Brand,Joseph M., Method and apparatus for removing encapsulating material from a packaged microelectronic device.
  22. Brand,Joseph M., Method and apparatus for removing encapsulating material from a packaged microelectronic device.
  23. Thummel, Steven G., Method for encasing array packages.
  24. Thummel,Steven G., Method for encasing plastic array packages.
  25. Nikitin, Ivan; Palm, Petteri; Mahler, Joachim, Method for forming electronic components.
  26. Williams, Vernon M.; Cobbley, Chad A., Method for packaging microelectronic substrates.
  27. Farnworth, Warren M.; Gochnour, Derek J., Method for substrate mapping.
  28. Ahmad, Syed Sajid, Method of Interconnecting substrates for electrical coupling of microelectronic components.
  29. Cobbley,Chad A., Method of encapsulating interconnecting units in packaged microelectronic devices.
  30. Cobbley,Chad A., Method of encapsulating packaged microelectronic devices with a barrier.
  31. Neo, Chee Peng; Tan, Hock Chuan; Chew, Beng Chye; Chai, Yih Ming; Tan, Kian Shing, Method of fabricating microelectronic component assemblies employing lead frames having reduced-thickness inner lengths.
  32. Chiu, Chia-Pin, Methods and apparatus for disposing a thermal interface material between a heat source and a heat dissipation device.
  33. Chiu,Chia Pin, Methods and apparatus for disposing a thermal interface material between a heat source and a heat dissipation device.
  34. Leonard E. Mess, Methods for ball grid array (BGA) encapsulation mold.
  35. Farnworth, Warren M., Methods for formation of recessed encapsulated microelectronic devices.
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  40. Benson,Peter A.; Watkins,Charles M., Methods for packaging microfeature devices and microfeature devices formed by such methods.
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  42. Farnworth, Warren M.; Wood, Alan G., Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods.
  43. Farnworth, Warren M.; Wood, Alan G., Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods.
  44. Clyne, Craig T.; Fernandez, John C., Methods of adhering microfeature workpieces, including a chip, to a support member.
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  47. Peterson, Darin L.; Wensel, Richard W.; Lee, Choon Kuan; Faull, James A., Microelectronic component assemblies having exposed contacts.
  48. Seng,Eric Tan Swee; Chung,Edmund Low Kwok, Microelectronic component assemblies with recessed wire bonds and methods of making same.
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  53. Grigg,Ford B., Microelectronic devices and methods for mounting microelectronic packages to circuit boards.
  54. Bolken, Todd O., Microelectronic devices and microelectronic die packages.
  55. Fee, Setho Sing, Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts.
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  58. Corisis, David J.; Chong, Chin Hui; Lee, Choon Kuan, Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices.
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  80. Corisis, David J.; Chong, Chin Hui; Lee, Choon Kuan, Packaged microelectronic devices recessed in support member cavities, and associated methods.
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  83. Cobbley, Chad A., Packaged microelectronic devices with interconnecting units.
  84. James, Stephen L.; Cobbley, Chad A., Packaged microelectronic devices with pressure release elements and methods for manufacturing and using such packaged microelectronic devices.
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  90. Miyajima, Fumio; Aoki, Kunihiro; Miyagawa, Tsutomu; Nakazawa, Hideaki, Resin molding machine and method of resin molding.
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  93. Farnworth, Warren M.; Gochnour, Derek J., Substrate mapping.
  94. Farnworth, Warren M.; Gochnour, Derek J., Substrate mapping.
  95. Farnworth,Warren M.; Gochnour,Derek J., Substrate mapping.
  96. Farnworth, Warren M., Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece.
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