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Memory map computer control system for programmable ICS 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-017/00
출원번호 US-0832989 (1997-04-04)
발명자 / 주소
  • Lawman Gary R.
  • Linoff Joseph D.
  • Wasson Stephen L.
출원인 / 주소
  • Xilinx, Inc.
대리인 / 주소
    Cartier
인용정보 피인용 횟수 : 22  인용 특허 : 15

초록

A table-based computer user interface and a method of providing design parameters are provided for configuring circuits for programmable ICs. A design database describing a circuit is displayed in table-based format on a computer screen display. The design database may include a memory map including

대표청구항

[ What is claimed is:] [1.] A computer control system comprising:means for displaying, on a screen display in table-based format, a memory map representing a contents of at least one bit-storage space of a programmable IC configured through a design database, the programmable IC further comprising u

이 특허에 인용된 특허 (15)

  1. Cohen Ariel (Zichron-Yaacov ILX) Holland William G. (Cary NC) Logan Joseph F. (Raleigh NC) Parash Avi (Ramat-Yishay ILX), Add-in board with enable-disable expansion ROM for PCI bus computers.
  2. Sample Stephen P. (Mountain View CA) D\Amour Michael R. (Los Altos Hills CA) Payne Thomas S. (Union City CA), Apparatus for emulation of electronic hardware system.
  3. Bair Owen S. ; Carbonara Matthew R., Automated generation of megacells in an integrated circuit design system.
  4. Robinson Mark T. (Carlsbad CA) Gardner Steven H. (San Diego CA) Wong Matt (San Diego CA) Kasmir Seton P. (San Diego CA) Balachandran Kumar (San Diego CA) Graham Sue (Encinitas CA) Schjelderup Gail (P, Cellular digtial packet data mobile data base station.
  5. Casselman Steven M., Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed.
  6. Halverson ; Jr. Richard P. (Honolulu HI) Lew Art Y. (Honolulu HI), Computer system and method using functional memory.
  7. Lawman Gary R. (San Jose CA) Wells Robert W. (Cupertino CA), Concurrent electronic circuit design and implementation.
  8. Baxter Glenn A., Configuration emulation of a programmable logic device.
  9. Morley Richard E. (Mason NH), Digital input/output system and method.
  10. Norris David (Portland OR), Dynamic network configuration.
  11. Casselman Steven Mark (Reseda CA), FPGA virtual computer for executing a sequence of program instructions by successively reconfiguring a group of FPGA in.
  12. Shaw Venson M. ; Shaw Steven M., Integrated circuit system for direct document execution.
  13. Deming Andrew S. ; Gardner Daniel T. ; Larsen James S. ; Leigh Bertrand, Method and apparatus for in-system programming of a programmable logic device using a two-wire interface.
  14. Taylor Brad (Oakland CA) Dowling Robert (Albany CA), System for compiling algorithmic language source code for implementation in programmable hardware.
  15. Agarwal Anant ; Babb Jonathan ; Tessier Russell, Virtual interconnections for reconfigurable logic systems.

이 특허를 인용한 특허 (22)

  1. Rode, Christian Stig, Apparatus for evaluating and demonstrating electronic circuits and components.
  2. Gilbert, Manfred, Automated microscope.
  3. Chang,Hui Huang; Ou,Hsin Ying; Lin,Liang Ji; Shih,Wei Chung, Chip design-in aid apparatus and method thereof.
  4. Meiyappan,Subramanian S.; Vajjhala,Varaprasad; Petryk,Edward M., Computer system and method to dynamically generate system on a chip description files and verification information.
  5. Andrade,Hugo A.; Odom,Brian Keith; Butler,Cary Paul; Peck,Joseph E.; Petersen,Newton G., Debugging a program intended to execute on a reconfigurable device using a test feed-through configuration.
  6. Dowling,Hubert H., Determining hardware parameters specified when configurable IP is synthesized.
  7. Schlacter,Guy R, Logic generation for multiple memory functions.
  8. Hale,Robert P., Method and apparatus to enable cross platform configuration.
  9. Merchant, James Daniel; Carskadon, Gordon; Evans, Brian P.; Hunt, Jeffery Scott; Nayak, Anup; Wright, Andrew, Method and system for generating a bit order data structure of configuration bits from a schematic hierarchy.
  10. Berstis, Viktors; Van Leeuwen, George Willard; Pritko, Steven Michael; Shaheen, Amal Ahmed, Method and system for verifying control accesses between a device on a non-proprietary bus and a device on a proprietary bus.
  11. Lawman Gary R. ; Linoff Joseph D. ; Wells Robert W., Method for configuring circuits over a data communications link.
  12. Carmichael Carl H. ; Theron Conrad A. ; St. Pierre ; Jr. Donald H., Method for reconfiguring a field programmable gate array from a host.
  13. Bissessur, Sailesh; Smith, David R., Method, system, and program for controlling multiple storage devices.
  14. Faulhaber,Steven F.; Sinykin,Joshua P.; Freel,Matthew K., Methods and systems for integrating unique information in SAS interface components.
  15. Brathwaite, Nicholas E.; Bommakanti, Ram Gopal; Ganapathy, Visvanathan; Burns, Paul N.; Maddox, Douglas Edward; Durkan, Michael Anthony, System and method for design, procurement and manufacturing collaboration.
  16. Brathwaite, Nicholas E.; Bommakanti, Ram Gopal; Ganapathy, Visvanathan; Burns, Paul N.; Maddox, Douglas Edward; Durkan, Michael Anthony, System and method for design, procurement and manufacturing collaboration.
  17. Brathwaite, Nicholas E.; Bommakanti, Ram Gopal; Ganapathy, Visvanathan; Burns, Paul N.; Maddox, Douglas Edward; Durkan, Michael Anthony, System and method for design, procurement and manufacturing collaboration.
  18. Brathwaite,Nicholas E.; Bommakanti,Ram Gopal; Ganapathy,Visvanathan; Burns,Paul N.; Maddox,Douglas Edward; Durkan,Michael Anthony, System and method for design, procurement and manufacturing collaboration.
  19. Owen, Daniel L.; Kusnic, Michael W., System, method and computer program product for a collaborative decision platform.
  20. Owen, Daniel L.; Kusnic, Michael W., System, method and computer program product for a collaborative decision platform.
  21. Owen, Daniel L.; Kusnic, Michael W., System, method and computer program product for a collaborative decision platform.
  22. Ilic, Kosta; Blasig, Dustyn K., Testing a graphical program intended for a programmable hardware element.
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