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Raised tungsten plug antifuse and fabrication processes

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0062298 (1998-04-17)
발명자 / 주소
  • Hawley Frank W.
  • McCollum John L.
  • Go Ying
  • Eltoukhy Abdelshafy
출원인 / 주소
  • Actel Corporation
대리인 / 주소
    Schafer
인용정보 피인용 횟수 : 13  인용 특허 : 113

초록

An antifuse comprises a lower electrode formed from a metal layer in a microcircuit. A interlayer dielectric layer is disposed over the lower electrode and has an aperture formed therein. A conductive plug, formed from a material such as tungsten, is formed in the aperture. The upper surface of the

대표청구항

[ What is claimed is:] [1.] A method of forming an antifuse, said method comprising:forming a lower conductive layer;forming an interlayer dielectric layer over said lower conductive layer with an aperture communicating with said lower conductive layer;forming a conductive plug in said aperture, sai

이 특허에 인용된 특허 (113)

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  63. Chen Wenn-Jei (Sunnyvale CA) Tseng Huan-Chung (Santa Clara CA) Yen Yeouchung (San Jose CA) Liu Linda (San Jose CA), Method for forming an ESD protection device for antifuses with top polysilicon electrode.
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  65. Kakumu Masakazu (Yokohama JPX) Asami Tetsuya (Yokohama JPX), Method for forming contact portion in semiconductor integrated circuit devices.
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  72. Ellsworth Daniel L. (Fort Collins CO) Sullivan Paul A. (Fort Collins CO), Method of fabricating a high density, low power, merged vertical fuse/bipolar transistor.
  73. Hawley Frank W. (Campbell CA), Method of fabricating an antifuse element having an etch-stop dielectric layer.
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  76. Tung Yingsheng (Plano TX) Montgomery Scott (Plano TX), Method of forming an antifuse.
  77. Ku San-Mei (3 Carnelli Ct. Poughkeepsie NY 12603) Perry Kathleen A. (22120 Viscanio Rd. Woodland Hills CA 91364), Method of forming contacts to a semiconductor device.
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  85. Lowrey Tyler A. (Boise ID) Lee Ruojia (Boise ID), One-sided ozone TEOS spacer.
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  88. Dixit Pankaj (San Jose CA) Holzworth Monta R. (Santa Clara CA) Klein Richard (Mountain View CA) Ingram ; III William P. (Los Altos CA), Plug contact with antifuse.
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  92. Wei Che-Chia (Plano TX), Programmable contact structure.
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이 특허를 인용한 특허 (13)

  1. Min, Won Gi; Perkins, Geoffrey W.; Zukowski, Kyle D.; Zuo, Jiang-Kai, Antifuses with curved breakdown regions.
  2. Albert Bergemont ; Alexander Kalnitsky, Dielectric-based anti-fuse cell with polysilicon contact plug and method for its manufacture.
  3. Wang, Daniel, Metal-to-metal antifuse structure and fabrication method.
  4. Shroff, Mehul D.; Jain, Rajiv, Metal-to-metal antifuse with non-conductive diffusion barrier.
  5. Tajima, Ryota; Tokunaga, Hajime, Method for manufacturing semiconductor device having antifuse with semiconductor and insulating films as intermediate layer.
  6. Shroff, Mehul D.; Jain, Rajiv, Method of forming a metal-to-metal antifuse with non-conductive diffusion barrier.
  7. Liu, Hsueh-Heng, Method to prevent antifuse Si damage using sidewall spacers.
  8. Min, Won Gi; Perkins, Geoffrey W.; Zukowski, Kyle D.; Zuo, Jiang-Kai, Methods for forming antifuses with curved breakdown regions.
  9. Issaq,A. Farid; Hawley,Frank; McCollum,John, Reprogrammable metal-to-metal antifuse employing carbon-containing antifuse material.
  10. Issaq,A. Farid; Hawley,Frank; McCollum,John, Reprogrammable metal-to-metal antifuse employing carbon-containing antifuse material.
  11. Greene, Jonathan; Hawley, Frank W.; McCollum, John, Resistive RAM devices for programmable logic devices.
  12. Tajima, Ryota; Tokunaga, Hajime, Semiconductor device having a plurality of antifuse memory cells.
  13. Issaq,A. Farid; Hawley,Frank, Switching ratio and on-state resistance of an antifuse programmed below 5 mA and having a Ta or TaN barrier metal layer.
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