초록 ▼

On an n-type semiconductor substrate 41 doped in high density, a p-type semiconductor layer 2, an n-type semiconductor layer 4 doped in high density, which is a collector, a p-type semiconductor layer 6 doped in high density, which is a base, and the n-type semiconductor layer 7, which is an emitter

On an n-type semiconductor substrate 41 doped in high density, a p-type semiconductor layer 2, an n-type semiconductor layer 4 doped in high density, which is a collector, a p-type semiconductor layer 6 doped in high density, which is a base, and the n-type semiconductor layer 7, which is an emitter, are sequentially stacked. To the collector layer, a collector electrode 12 is electrically connected, and to the base layer, a base electrode 11 is electrically connected, and to the emitter layer, an emitter electrode 9 is electrically connected, and thus a bipolar transistor is structured. On the bipolar transistor, an insulated isolation area 55 is formed with an opening therein, whose depth reaches the surface of the substrate, and a substrate electrode 48 is formed thereon. On the bipolar transistor and the insulated isolation area 55, an inter-layer dielectric layer 54 is formed having contact holes formed to upper parts of the emitter electrode 49 and to the substrate electrode 48. The emitter electrode 49 and the substrate electrode 48 are connected to each other by ground wiring.

대표청구항 ▼

[ What is claimed is:] [1.] A semiconductor device comprising:a conductive compound semiconductor substrate that impurities are doped in high density;an isolation layer stacked on the substrate;a bipolar transistor element that a collector layer, base layer, and emitter layer are sequentially stacke

[ What is claimed is:] [1.] A semiconductor device comprising:a conductive compound semiconductor substrate that impurities are doped in high density;an isolation layer stacked on the substrate;a bipolar transistor element that a collector layer, base layer, and emitter layer are sequentially stacked on the isolation layer and that a collector electrode, base electrode, and emitter electrode are provided on the respective layers;an insulated isolation layer formed on the compound semiconductor substrate outside the area where the bipolar transistor element is formed; anda ground wiring layer for electrically connecting the emitter electrode of the bipolar transistor element and the compound semiconductor substrate via a contact hole formed in the insulated isolation layer.