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Apparatus and method for in-system programming of integrated circuits containing programmable elements 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-019/177
출원번호 US-0872652 (1997-06-10)
발명자 / 주소
  • Herrmann Alan L.
  • Southgate Timothy J.
출원인 / 주소
  • Altera Corporation
대리인 / 주소
    Galliani
인용정보 피인용 횟수 : 78  인용 특허 : 10

초록

An apparatus and method for in-system programming of programmable devices includes a device configuration program with adaptive programming source code instructions that characterize device configuration instructions and data. The adaptive source code instructions may include conditional branches, s

대표청구항

[ What is claimed is:] [1.] A computer readable memory to direct a programmable logic device controller to generate controls signals to program a programmable device in a specified manner, comprising:executable instructions stored in said memory, said executable instructions includinga programmable

이 특허에 인용된 특허 (10)

  1. Parlour David B. (Pittsburgh PA) Goetting F. Erich (Cupertino CA) Trimberger Stephen M. (San Jose CA) Young Edel M. (Palo Alto CA), Adaptive programming method for antifuse technology.
  2. Srinivasan Seshan R. (1524 Condor Way Sunnyvale CA 94087), Apparatus and method for automatic test generation and fault simulation of electronic circuits, based on programmable lo.
  3. Curd Derek R. ; Rao Kameswara K. ; Lee Napoleon W., Efficient in-system programming structure and method for non-volatile programmable logic devices.
  4. Baxter Glenn A., Method and apparatus for converting a programmable logic device representation of a circuit into a second representation.
  5. Mason Martin T. ; Evans Scott C. ; Aranake Sandeep S., Method and system for configuring an array of logic devices.
  6. Trimberger Stephen M., Method for compiling and executing programs for reprogrammable instruction set accelerator.
  7. Grant Douglas M.,GBX ; Gray John P.,GBX, Method for linking a hardware description to an IC layout.
  8. Ong Randy T. (Cupertino CA), Programmable logic device which stores more than one configuration and means for switching configurations.
  9. Trimberger Stephen M., Reprogrammable instruction set accelerator.
  10. Trimberger Stephen M., Reprogrammable instruction set accelerator using a plurality of programmable execution units and an instruction page tab.

이 특허를 인용한 특허 (78)

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  2. Rangasayee, Krishna; Prasad, Nitin, Apparatus and method for programming a set of programmable logic devices in parallel.
  3. Plum, Thomas S.; Keaton, David M., Automated safe secure techniques for eliminating undefined behavior in computer software.
  4. Sun, Shin Nan; Zhu, Limin; Speers, Theodore; Bakker, Gregory, Clock-generator architecture for a programmable-logic-based system on a chip.
  5. Sun,Shin Nan; Zhu,Limin; Speers,Theodore; Bakker,Gregory, Clock-generator architecture for a programmable-logic-based system on a chip.
  6. Gomez,Joseph J., Concurrent in-system programming of programmable devices.
  7. Crabill, Eric J., Configurable processor system.
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  11. May,Roger; Draper,Andrew, Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream.
  12. Hutner, Marc Reuben; Rowe, John F., Debugging in a semiconductor device test environment.
  13. Schubert, Nils Endric; Beardslee, John Mark; Perry, Douglas L., Design instrumentation circuitry.
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  24. Balasubramanian, Rabindranath; Kolkind, Kurt; Bakker, Gregory, Integrated circuit including programmable logic and external-device chip-enable override control.
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  30. New, Bernard J.; Donlin, Adam P., Method and apparatus for configuring a programmable logic device using a master JTAG port.
  31. Pabla, Kuldipsingh, Method and apparatus for detecting device support in a graphical user interface.
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  39. Correa, Colt R., Method for ECU calibration and diagnostics development.
  40. Farrugia, Jennifer; Ahmed, Elias; Bourgeault, Mark, Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functions.
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  43. Wassel, Peter S.; Gdaniec, Joseph M.; Harter, John L., Method, system, and program product for composing a virtualized computing environment.
  44. Huuck, Ralf; Rauch, Felix; Blackham, Bernard; Seefried, Sean, Multi language software code analysis.
  45. Jacobson,Neil G., Network based diagnostic system and method for programmable hardware.
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  49. Bakker,Gregory, Power-up and power-down circuit for system-on-a-chip integrated circuit.
  50. Ward, Derek, Programmable controller for use with monitoring device.
  51. Ward, Derek, Programmable logic controller and related electronic devices.
  52. Boggs, Mark Steven; Fulton, Temple L.; Hausman, Steve; McNabb, Gary; McNutt, Alan; Stimmel, Steven W., Programmable logic controller customized function call method, system and apparatus.
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  56. Balasubramanian, Rabindranath; Bakker, Gregory, Programmable system on a chip for power-supply voltage and current monitoring and control.
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  68. Howard S. Tang ; Albert Chan ; Cyrus Y. Tsui, Simultaneous wired and wireless remote in-system programming of multiple remote systems.
  69. Allison,David S., Stream operator in a dynamically typed programming language.
  70. Austin H. Lesea ; Stephen M. Trimberger, Supporting multiple FPGA configuration modes using dedicated on-chip processor.
  71. Allamsetty, Chakravarthy K., System and method for testing a circuit implemented on a programmable logic device.
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  77. Bakker,Gregory, Voltage-and temperature-compensated RC oscillator circuit.
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