$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Method and apparatus for reducing particle contamination in a substrate processing chamber 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05H-001/24
출원번호 US-0271412 (1999-03-17)
발명자 / 주소
  • Gupta Anand
출원인 / 주소
  • Applied Materials, Inc.
대리인 / 주소
    Townsend & Townsend & Crew
인용정보 피인용 횟수 : 10  인용 특허 : 31

초록

A method and apparatus for reducing particle contamination in a substrate processing chamber during deposition of a film having at least two layers. The method of the present invention includes the steps of introducing a first process gas into a chamber to deposit a first layer of the film over a wa

대표청구항

[ What is claimed is:] [1.] A method of operating a substrate processing chamber to deposit an in-situ multilayer film over a substrate disposed in the chamber, said method comprising:(a) during a first deposition stage flowing a first process gas into the chamber from a gas inlet to deposit a first

이 특허에 인용된 특허 (31)

  1. Wang David N. (Cupertino CA) White John M. (Hayward CA) Law Kam S. (Union City CA) Leung Cissy (Union City CA) Umotoy Salvador P. (Pittsburg CA) Collins Kenneth S. (San Jose CA) Adamik John A. (San R, CVD of silicon oxide using TEOS decomposition and in-situ planarization process.
  2. Monkowski Joseph R. (Carlsbad CA) Logan Mark A. (Carlsbad CA), Chemical vapor deposition reactor and method of use thereof.
  3. Gupta Anand (San Jose CA) Ye Yan (Campbell CA) Lanucha Joseph (Sunnyvale CA), Control of particle generation within a reaction chamber.
  4. Moghadam Farhad K. (Los Gatos CA), Dielectric deposition and cleaning process for improved gap filling and device planarization.
  5. Matsutani Takeshi (Machida JPX), Dry etching method for refractory metals, refractory metal silicides, and other refractory metal compounds.
  6. Egitto Frank D. (Binghamton NY) Mlynko Walter E. (Vestal NY), Enhanced plasma etching.
  7. Cain John (Schertz TX) Fujishiro Felix (San Antonio TX) Lee Chang-Ou (San Antonio TX) Koenigseder Sigmund (San Antonio TX) Vines Landon (San Antonio TX), Integrated-circuit processing with progressive intermetal-dielectric deposition.
  8. Hsia Shaw-Tzeng (Taipei TWX) Chen Kuang-Chao (Taipei TWX), Inter-metal-dielectric planarization process.
  9. Moslehi Mehrdad M. (Dallas TX), Low-temperature in-situ dry cleaning process for semiconductor wafers.
  10. Sasaki Naoto (Fuchu JPX) Sato Fumihiko (Fuchu JPX), Magnetron sputtering etching apparatus.
  11. Fukuda Hisashi (Tokyo JPX), Method and device for cleaning substrates.
  12. Hellwig Lance G., Method and system for monocrystalline epitaxial deposition.
  13. Kwok Kurt (Mountain View CA) Robertson Robert (Palo Alto CA), Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity.
  14. Kozuka Hiraku (Hiratsuka JPX), Method for producing non-monocrystalline semiconductor device.
  15. Blanchard Gary W. (Milton VT) Bossi Charles R. (Burlington VT) Payne Edward H. (Essex Junction VT) Weeks Thomas W. (Essex Junction VT), Method for reducing foreign matter on a wafer etched in a reactive ion etching process.
  16. Gupta Anand (San Jose CA), Method for removing particulate contaminants by magnetic field spiking.
  17. Wang Chih C. (Hightstown NJ) Bates Ronald F. (Trenton NJ), Method of depositing an abrasive layer.
  18. Narita Tomonori (Tokyo JPX), Method of forming conductive layer including removal of native oxide.
  19. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
  20. Kinney Patrick (Sunnyvale CA) Fishkin Boris (San Jose CA) Zhao Jun (San Jose CA) Gupta Anand (Santa Clara CA) Bendler Robert (Mountain View CA), Particle monitor system and method.
  21. Savas Stephen E. (Newark CA), Particulate contamination prevention using low power plasma.
  22. Lantsman Alexander D. (Middletown NY), Plasma processing system with reduced particle contamination.
  23. Liao Chih-Cherng (Hsinchu TWX), Plasma purge method for plasma process particle control.
  24. Kawasaki Yoshinao (Yamaguchi JPX) Kawahara Hironobu (Kudamatsu JPX) Kakehi Yutaka (Hikari JPX) Hirobe Kado (Koganei JPX) Kudo Katsuyoshi (Kudamatsu JPX), Plasma treating method and apparatus therefor.
  25. Troue Harden H. (Plainfield IN), Process for producing textured coatings.
  26. Yoshida Yukimasa (Kawasaki JPX) Watanabe Tohru (Tokyo JPX), Reactive ion etching method.
  27. Gupta Anand (San Jose CA), Reducing particulate contamination during semiconductor device processing.
  28. Nulman Jaim (Palo Alto CA), Single anneal step process for forming titanium silicide on semiconductor wafer.
  29. Wu Hong Jen (Hsin chu TWX) Chen Taylor (Hsin chu TWX) Lai Jack (Hsin chu TWX) Chen I. I. (Hsin chu TWX), Single semiconductor wafer transfer method and manufacturing system.
  30. Wu Hong-Jen,TWX ; Chen Taylor,TWX ; Lai Jack,TWX ; Chen I. I.,TWX, Single semiconductor wafer transfer method and manufacturing system.
  31. Inoue Minoru (Kawasaki JPX), Sputtering method for fabricating thin film.

이 특허를 인용한 특허 (10)

  1. Janakiraman, Karthik; Suarez, Edwin C., Blocker plate by-pass for remote plasma clean.
  2. Anand Gupta, Decontamination of a plasma reactor using a plasma after a chamber clean.
  3. Dhas, Arul; Boumatar, Kareem; Ramsayer, Christopher James, Defect control and stability of DC bias in RF plasma-based substrate processing systems using molecular reactive purge gas.
  4. Augustyniak, Edward; Ramsayer, Christopher James; Singhal, Akhil N.; Boumatar, Kareem, Defect control in RF plasma substrate processing systems using DC bias voltage during movement of substrates.
  5. Nishikawa, Hiroshi, Method and apparatus for processing workpiece.
  6. Chin,Sheng Chi; Lin,Shy Jay, Method to reduce particle level for dry-etch.
  7. Chin-Tsai Chen TW; Chao-Ray Wang TW, Method to solve intermetallic dielectric cracks in integrated circuit devices.
  8. Rogers, Matthew; Ripley, Martin, Methods and apparatus for processing a substrate.
  9. Kang, Hu; LaVoie, Adrien, Systems and methods for removing particles from a substrate processing chamber using RF plasma cycling and purging.
  10. Kang, Hu; LaVoie, Adrien, Systems and methods for removing particles from a substrate processing chamber using RF plasma cycling and purging.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로