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Power reduction in a multiprocessor digital signal processor based on processor load

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-001/32
  • G06F-009/44
출원번호 US-0128030 (1998-08-03)
발명자 / 주소
  • Nicol Christopher J.
  • Singh Kanwar Jit
대리인 / 주소
    Brendzel
인용정보 피인용 횟수 : 183  인용 특허 : 6

초록

Improved operation of multi-processor chips is achieved by dynamically controlling processing load of chips and controlling, significantly greater than on/off granularity, the operating voltages of those chips so as to minimize overall power consumption. A controller in a multi-processor chip alloca

대표청구항

[ We claim:] [1.] A method executed within a system for controlling power consumption of a sub-circuit of said system comprising the steps of:ascertaining time allotted for carrying out an assigned task;determining a lowest frequency at which or above which the sub-circuit must operate in order to c

이 특허에 인용된 특허 (6)

  1. Jackson Robert T. ; Nachtsheim Stephen P. ; Ma Taufik T., Circuit and method for controlling power and performance based on operating environment.
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  5. Perry Richard A. (Charlotte NC) Stant Vernon L. (Richmond VA), Power conservation in microprocessor controlled devices.
  6. Evoy David R., System for reducing the power consumption of a computer system and method therefor.

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