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Apparatus for and method of manufacturing a semiconductor die carrier 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01R-009/00
출원번호 US-0178650 (1998-10-26)
발명자 / 주소
  • Crane
  • Jr. Stanford W.
  • Larcomb Daniel
  • Krishnapura Lakshminarasimha
출원인 / 주소
  • Silicon Bandwidth, Inc.
대리인 / 주소
    Morgan, Lewis & Bockius LLP
인용정보 피인용 횟수 : 5  인용 특허 : 54

초록

A lead insertion machine includes a substrate supply, a conductive lead supply, and an lead insertion mechanism. The conductive leads are inserted into lead passages formed in side walls of the substrate. Also disclosed is a method of manufacturing a semiconductor die carrier including the steps of

대표청구항

[ We claim:] [1.] A method of manufacturing a semiconductor die carrier including a substrate having a plurality of side walls, comprising the step of:simultaneously inserting at least one conductive lead into a lead passage through one of the side walls of the substrate for retention therein and at

이 특허에 인용된 특허 (54)

  1. Scherer Jeremy D. (Dartmouth MA) Tower Steven A. (Dartmouth MA), All metal flat package for microcircuitry.
  2. Smith Donald A. (Union City PA) Carter William H. (Union City PA) Dingfelder Howard E. (Corry PA) Burgess Dale L. (Union City PA) Gates Alan B. (Corry PA), Apparatus for making plastic leaded chip carrier connectors.
  3. Crane ; Jr. Stanford W. (Boca Raton FL) Portuondo Maria M. (Delray Beach FL), Apparatus having inner layers supporting surface-mount components.
  4. Higgins ; III Leo M. (Lakeville MA), Circuit board fabrication.
  5. Kochanski Ronald P. (Arlington Heights IL) Schmidt Detlef W. (Schaumburg IL), Device with captivate chip capacitor devices and method of making the same.
  6. Gatto Donald F. (Sunrise FL) Milciunas Juan (Ft. Lauderdale FL), Dual electronic component assembly.
  7. Goldfarb Samuel (21 Sycamore Dr. Roslyn ; County of Nassau NY 11576), Electronic component package with multiconductive base forms for multichannel mounting.
  8. Kondo Mitsuhiro (Oogaki JPX) Watanabe Osamu (Oogaki JPX), Encapsulated semiconductor device with bridge sealed lead frame.
  9. Sugimoto Masahiro (Yokosuka JPX) Wakasugi Yasumasa (Kawasaki JPX) Harada Shigeki (Kawasaki JPX), Heatsink package for flip-chip IC.
  10. Frankeny, Jerome A.; Frankeny, Richard F.; Haj-Ali-Ahmadi, Javad; Hermann, Karl; Imken, Ronald L., High density interconnect strip.
  11. Pope Richard A. (Austin TX) Boling Clyde W. (Austin TX) Bates David A. (Cedar Park TX), High-density connector.
  12. Crane ; Jr. Stanford W. (3934 NW. 57th St. Boca Raton FL 33496), High-density electrical interconnect system.
  13. Crane ; Jr. Stanford W. (3934 NW. 57th St. Boca Raton FL 33496), High-density electrical interconnect system.
  14. Crane ; Jr. Stanford W. (3934 NW. 57th St. Boca Raton FL 33496), High-density electrical interconnect system.
  15. Salera Edmond A. (Santa Barbara CA), Hybrid microelectronic circuit package.
  16. Krumme John F. (Woodside CA) Hodgson Darel E. (Palo Alto CA), Integrated circuit package and seal therefor.
  17. Tukamoto Takashi (Suwa JPX) Abe Sachiyuki (Suwa JPX) Yabushita Tetsuo (Suwa JPX) Hayashi Yoshimitsu (Suwa JPX), Integrated circuit package for flexible computer system alternative architectures.
  18. Kuroda Masao (Aichi JPX), Integrated-circuit package.
  19. Nelson Gregory H. (Gilbert AZ) Lebow Sanford (Westlake CA) Nogavich Eugene (Gilbert AZ), Interconnect device and method of manufacture thereof.
  20. Masayuki Watanabe (Yokohama JPX) Toshio Sugano (Kokubunji JPX) Seiichiro Tsukui (Komoro JPX) Takashi Ono (Akita JPX) Yoshiaki Wakashima (Kawasaki JPX), Lead connections means for stacked tab packaged IC chips.
  21. Swamy Deepak (Austin TX) Pecone Victor (Austin TX), Leadless high density connector.
  22. Keglewitsch Josef (Addison IL) Vladic Daniel P. (Berwyn IL), Low cost electrical connector.
  23. Kobayashi Yasushi (Kamikodanaka JPX) Kogure Seiji (Nakahara JPX), Method for encapsulting IC chip.
  24. Koepke Richard A. (New Bedford MA) Koepke George O. (Rochester NY), Method for fabricating a fold-up frame.
  25. Smith Donald A. (Union City PA) Carter William H. (Union City PA) Dingfelder Howard E. (Corry PA) Burgess Dale L. (Union City PA) Gates Alan B. (Corry PA), Method for making plastic leaded chip carrier.
  26. Hingorany Prem R. (Broomfield CO), Method of manufacture power hybrid microcircuit.
  27. Crane ; Jr. Stanford W. (Boca Raton FL) Portuondo Maria M. (Delray Beach FL), Method of manufacturing a semiconductor chip carrier affording a high-density external interface.
  28. Crane ; Jr. Stanford W. (Boca Raton FL) Portuondo Maria M. (Delray Beach FL), Method of manufacturing an apparatus having inner layers supporting surface-mount components.
  29. Gregoire George D. (San Diego CA), Method of mounting a surface-mountable IC to a converter board.
  30. Watanabe Tamio (Shizuoka JPX), Method of producing terminal for base board.
  31. Gates ; Jr. Louis E. (Westlake Village CA) Kamensky Albert (Redondo Beach CA) Devendorf Don C. (Los Angeles CA), Microelectronic package.
  32. Reylek Robert S. (St. Paul MN) Thompson Kenneth C. (St. Paul MN), Miniature multiple conductor electrical connector.
  33. Taniuchi Kenjiro (Kawasaki JPX) Miyazawa Hideo (Kawasaki JPX) Ishikawa Kouji (Kawasaki JPX) Watanabe Kouji (Kawasaki JPX), Mounting device for mounting an electronic device on a substrate by the surface mounting technology.
  34. Martens John D. (Plano TX) Ammon J. Preston (Dallas TX), Multi row high density connector.
  35. Feng Bai-Cwo (Tarrytown NY) Feng George C. (Fishkill NY) McMaster Richard H. (Wappingers Falls NY), Multi-layer package incorporating a recessed cavity for a semiconductor chip.
  36. Koepke Richard A. (New Bedford MA), Multi-path feed-thru lead and method for formation thereof.
  37. Hirano Naohiko (Yokohama JPX), Multilayer package.
  38. Selinko George J. (Lighthouse Point FL), Non-hermetically sealed stackable chip carrier package.
  39. Ingram Arthur J. (Allentown PA) Weingrod Irving (Allentown PA), Package for semiconductor integrated circuits.
  40. Griswold Bradley L. (San Jose CA) Ho Chung W. (Monte Sereno CA) Robinette ; Jr. William C. (Los Altos CA), Packaging and interconnect system for integrated circuits.
  41. Buck Jonathan E. (Harrisburg PA) Rose William H. (Harrisburg PA), Paired contact electrical connector system.
  42. Shirling David J. (Waterbury CT), Pin grid array having seperate posts and socket contacts.
  43. Kohno Ryuji (Ibaraki JPX) Nishimura Asao (Ushiku JPX) Kitano Makoto (Tsuchiura JPX) Yaguchi Akihiro (Ibaraki JPX) Yoneda Nae (Ibaraki JPX), Plastic-molded-type semiconductor device.
  44. Abe Kimihiro (Shizuoka JPX), Pressure-contact connector.
  45. Sakemi Shouzi (Fukuoka JPX) Sakai Tadahiko (Fukuoka JPX), Printed circuit board.
  46. Hashemi Seyed H. (Austin TX) Olla Michael A. (Austin TX) Parker John C. (Round Rock TX), Process for manufacturing a stacked multiple leadframe semiconductor package using an alignment template.
  47. Utunomiya Jiro (Tokyo JPX) Iida Saburo (Tokyo JPX) Sibuya Hitosi (Tokyo JPX) Kusaba Kazunori (Tokyo JPX) Narumi Isao (Tokyo JPX), Process of assembling terminal structure.
  48. Brown Candice H. (San Jose CA), Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit la.
  49. Arima Hideo (Yokohama JPX) Takeda Kenji (Kamakura JPX) Yamamura Hideho (Yokohama JPX) Kobayashi Fumiyuki (Sagamihara JPX), Semiconductor chip carrier, module having same chip carrier mounted therein, and electronic device incorporating same mo.
  50. Lee James C. K. (Los Altos CA) Amdahl Gene M. (Atherton CA) Amdahl Carlton G. (Saratoga CA) Beck Richard L. (Cupertino CA), Semiconductor chip module interconnection system.
  51. Sugimoto Masahiro (Yokosuka JPX) Wakabayashi Tetsushi (Yokohama JPX) Muratake Kiyoshi (Kawasaki JPX), Semiconductor device.
  52. Kohara Masanobu (Itami JPX) Kondo Takashi (Itami JPX) Yama Yomiyuki (Itami JPX), Semiconductor device and package.
  53. Seidler Jack (Flushing NY), Solder-bearing lead.
  54. Dutta Vivek B. (Cupertino CA) Demmin Jeffrey C. (Mt. View CA) DiOrio Mark L. (Cupertino CA) Ewanich Jon T. (Cupertino CA), Stadium-stepped package for an integrated circuit with air dielectric.

이 특허를 인용한 특허 (5)

  1. Weber, Jerome L.; Kole, David J., Automatic feeder for carrier-supported contacts.
  2. Kou, Yuen-Foo Michael, Detecting component carrier tape splicing.
  3. Miyahara, Seiichi; Nakai, Nobuhiro; Murakami, Minoru; Fukagawa, Takahiro; Yazawa, Takashi; Yamasaki, Kimiyuki, Electronic component mounting device and work method of electronic component mounting device.
  4. Kou, Yuen-Foo Michael, Electronic component placement.
  5. Watters, Jimmy H., Method and apparatus for manufacturing battery plates.
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