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Semiconductor substrate and method of manufacturing the same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/30
  • H01L-021/46
출원번호 US-0047326 (1998-03-25)
우선권정보 JP0075545 (1997-03-27)
발명자 / 주소
  • Sato Nobuhiko,JPX
  • Yonehara Takao,JPX
  • Sakaguchi Kiyofumi,JPX
출원인 / 주소
  • Canon Kabushiki Kaisha, JPX
대리인 / 주소
    Fitzpatrick, Cella, Harper & Scinto
인용정보 피인용 횟수 : 112  인용 특허 : 3

초록

A manufacturing method excellent in controllability, productivity and economics of a high-quality SOI wafer and a wafer manufactured by that method are provided. After wafer bonding, separation is made on an interface of a high porosity layer in a porous region including a low porosity layer and the

대표청구항

[ What is claimed is:] [1.] A method of manufacturing a semiconductor substrate comprising the steps of:preparing a first substrate having a porous region including at least two layers different in porosity and a non-porous layer formed on said porous region;bonding a surface of said non-porous laye

이 특허에 인용된 특허 (3)

  1. Sakaguchi Kiyofumi (c/o Canon Kabushiki Kaisha 30-2 ; 3-chome Shimomaruko ; Ohta-ku ; Tokyo JPX) Yonehara Takao (c/o Canon Kabushiki Kaisha 30-2 ; 3-chome Shimomaruko ; Ohta-ku ; Tokyo JPX) Nishida S, Method for producing semiconductor device substrate by bonding a porous layer and an amorphous layer.
  2. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Method for producing semiconductor substrate.
  3. Sakaguchi Kiyofumi,JPX ; Yonehara Takao,JPX, Process for production of semiconductor substrate.

이 특허를 인용한 특허 (112)

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