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Semiconductor metalization barrier 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
  • H01L-023/52
  • H01L-029/40
출원번호 US-0282079 (1999-03-30)
발명자 / 주소
  • Lopatin Sergey D.
  • Pramanick Shekhar
  • Brown Dirk
출원인 / 주소
  • Advanced Micro Devices, Inc.
대리인 / 주소
    Ishimaru
인용정보 피인용 횟수 : 184  인용 특허 : 5

초록

A semiconductor metalization barrier, and manufacturing method therefor, is provided which is a stack of a cobalt layer and cobalt tungsten layer deposited on a copper bonding pad.

대표청구항 ▼

[ The invention claimed is:] [1.] A semiconductor device comprising:a semiconductor substrate;a first dielectric layer on said semiconductor substrate, said first dielectric layer having an opening provided therein;a first conductive layer disposed in said opening in said first dielectric layer;a se

이 특허에 인용된 특허 (5)

  1. Yeh Kuantai ; Chatila Ahmad ; Sharifzadeh Shahin, Alignment process compatible with chemical mechanical polishing.
    상세보기
  2. Zhao Bin ; Vasudev Prahalad K. ; Horwath Ronald S. ; Seidel Thomas E. ; Zeitzoff Peter M., Dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer.
    상세보기
  3. Boeck Bruce Allen ; Wetzel Jeff Thomas ; Sparks Terry Grant, Method for manufacturing a low dielectric constant inter-level integrated circuit structure.
    상세보기
  4. Schacham-Diamand Yosef ; Dubin Valery M. ; Ting Chiu H. ; Zhao Bin ; Vasudev Prahalad K. ; Desilva Melvin, Protected encapsulation of catalytic layer for electroless copper interconnect.
    상세보기
  5. Dubin Valery M. (Cupertino CA) Schacham-Diamand Yosi (Ithaca NY) Zhao Bin (Irvine CA) Vasudev Prahalad K. (Austin TX) Ting Chiu H. (Saratoga CA), Use of cobalt tungsten phosphide as a barrier material for copper metallization.
    상세보기

이 특허를 인용한 특허 (184)

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