초록 ▼

A method for making metal plugs in via holes and interconnections by an improved chem/mech polishing process using an organic protective layer is achieved. After devices are formed on a substrate which includes a patterned conducting layer, a low-k insulating layer is deposited and planarized. An or

A method for making metal plugs in via holes and interconnections by an improved chem/mech polishing process using an organic protective layer is achieved. After devices are formed on a substrate which includes a patterned conducting layer, a low-k insulating layer is deposited and planarized. An organic protective layer, such as a polymer, is deposited, and contact holes are etched in the polymer and insulating layers. A thin Ti/TiN barrier layer is deposited and a tungsten metal is deposited sufficiently thick to fill the contact holes. The tungsten metal and barrier layers are chem/mech polished back to form metal plugs, while the protective layer protects the insulating layer from CMP scratching and other CMP defects. The organic protective layer is easily removed using plasma ashing and other cleaning steps. The method is also applicable to forming metal interconnections. Trenches are etched, over and to the metal plugs, in an insulating layer having an organic protective layer. A barrier layer is deposited and a highly conductive metal, such as AlCu alloy or Cu, is deposited and are chem/mech polished back to the protective layer. The protective layer is then removed to form the metal interconnections in the insulator.

대표청구항 ▼

[ What is claimed is:] [1.] A method for making recessed patterned metal structures in an insulating layer by chemical/mechanical polishing comprising the steps of:providing a semiconductor substrate having semiconductor devices;forming a planar insulating layer composed of silicon oxide on said sub

[ What is claimed is:] [1.] A method for making recessed patterned metal structures in an insulating layer by chemical/mechanical polishing comprising the steps of:providing a semiconductor substrate having semiconductor devices;forming a planar insulating layer composed of silicon oxide on said substrate;depositing an organic protective layer on said insulating layer;etching recesses in said organic protective layer and in said insulating layer;depositing a conformal barrier/adhesion layer on said organic protective layer and in said recesses;depositing a metal layer sufficiently thick to fill said recesses and to form an essentially planar surface;chemically/mechanically polishing back said metal layer and said barrier layer to said organic protective layer, wherein said organic protective layer protects said insulating layer from polishing-induced defects;removing selectively said organic protective layer to said insulating layer to complete said patterned metal structures, coplanar with top surface of said insulating layer.