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Cell placement representation and transposition for integrated circuit physical design automation system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-017/50
출원번호 US-0230383 (1994-04-19)
발명자 / 주소
  • Scepanovic Ranko
  • Koford James S
  • Jones Edwin R.
  • Boyle Douglas B.
  • Rostoker Michael D.
출원인 / 주소
  • LSI Logic Corporation
대리인 / 주소
    Mitchell Silberberg & Knupp LLP
인용정보 피인용 횟수 : 124  인용 특허 : 30

초록

A large number of possible cell placements for an integrated circuit chip are evaluated to determine which has the highest fitness in accordance with a predetermined criteria such as interconnect congestion. Each cell placement, which constitutes an individual permutation of cells from a population

대표청구항

[ We claim:] [1.] A physical design automation system for determining a highest fitness cell placement for an integrated circuit chip, comprising:a memory for storing a first cell placement as including an initial cell placement and a first list of cell transpositions by which said first cell placem

이 특허에 인용된 특허 (30)

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  13. Chene Mon R. (Cupertino CA) Trimberger Stephen M. (San Jose CA), Logic placement using positionally asymmetrical partitioning algorithm.
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  30. Toyonaga Masahiko (Osaka JPX) Akino Toshiro (Osaka JPX) Okude Hiroaki (Osaka JPX), System for optimizing a physical organization of elements of an integrated circuit chip through the convergence of a red.

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