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Process of mounting spring contacts to semiconductor devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
  • H01L-021/48
  • H01L-021/50
출원번호 US-0499963 (2000-02-08)
발명자 / 주소
  • Chang Sung Chul
  • Khandros Igor Y.
  • Smith William D.
출원인 / 주소
  • FormFactor, Inc.
대리인 / 주소
    Linden
인용정보 피인용 횟수 : 101  인용 특허 : 2

초록

A process for providing a plurality free-standing resilient contact structures (spring elements) mounted to a surface of a carrier substrate. The carrier substrate is mounted to a surface of a semiconductor device, or one or more unsingulated semiconductor dies. Bond pads of the semiconductor device

대표청구항

[ What is claimed is:] [1.] A method of mounting contact structures to semiconductor devices, comprising:fabricating a plurality of free-standing contact structures on a surface of a carrier substrate;disposing the carrier substrate on a surface of at least one semiconductor device; andconnecting se

이 특허에 인용된 특허 (2)

  1. Phy William S. (Los Altos Hills CA), Process of forming a compliant lead frame for array-type semiconductor packages.
  2. Cotues Paul W. (Yorktown Heights NY) Moskowitz Paul A. (Yorktown Heights NY) Murphy Philip (New Fairfield CT) Ritter Mark B. (Brookfield CT) Walker George F. (New York NY), Stepped electronic device package.

이 특허를 인용한 특허 (101)

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  11. Yumi, Hideo; Yagi, Masaru, Conductive element and manufacturing method thereof.
  12. Khandros,Igor Y., Contact structures and methods for making same.
  13. Campbell, Richard; Strid, Eric W.; Andrews, Mike, Differential signal probe with integral balun.
  14. Strid, Eric; Campbell, Richard, Differential signal probing system.
  15. Campbell, Richard L.; Andrews, Michael, Differential waveguide probe.
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  21. Andrews, Peter; Hess, David; New, Robert, Interface for testing semiconductors.
  22. Tervo,Paul A.; Cowan,Clarence E., Low-current pogo probe card.
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  24. Schwindt,Randy J., Low-current probe card.
  25. Durbin, Aaron; Johnson, Morgan T.; Santos, Jose A., Maintaining a wafer/wafer translator pair in an attached state free of a gasket diposed.
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  29. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing method using improved contact.
  30. Gleason, K. Reed; Smith, Kenneth R.; Bayne, Mike, Membrane probing structure with laterally scrubbing contacts.
  31. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth; Lesher, Timothy; Koxxy, Martin, Membrane probing system.
  32. Gleason,Reed; Bayne,Michael A.; Smith,Kenneth; Lesher,Timothy; Koxxy,Martin, Membrane probing system.
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  35. Smith,Kenneth; Gleason,Reed, Membrane probing system.
  36. Tervo,Paul A.; Smith,Kenneth R.; Cowan,Clarence E.; Dauphinais,Mike P.; Koxxy,Martin J., Membrane probing system.
  37. Tervo,Paul A.; Smith,Kenneth R.; Cowan,Clarence E.; Dauphinais,Mike P.; Koxxy,Martin J., Membrane probing system.
  38. Gleason, K. Reed; Smith, Kenneth R.; Bayne, Mike, Membrane probing system with local contact scrub.
  39. Gleason,K. Reed; Smith,Kenneth R.; Bayne,Mike, Membrane probing system with local contact scrub.
  40. Gleason,Reed; Bayne,Michael A.; Smith,Kenneth, Method for constructing a membrane probe using a depression.
  41. Lin, Mou-Shiung; Lee, Jin-Yuan; Huang, Ching-Cheng, Method for fabricating circuitry component.
  42. Hayden, Leonard; Martin, John; Andrews, Mike, Method of assembling a wafer probe.
  43. Gleason, Reed; Bayne, Michael A.; Smith, Kenneth, Method of constructing a membrane probe.
  44. Tunaboylu,Bahadir; Hicklin,Jeff; Pipps,Ivan; Dang,Son; Back,Gerry, Method of probe tip shaping and cleaning.
  45. Smith, Kenneth R., Method of replacing an existing contact of a wafer probing assembly.
  46. Derderian, James M., Methods for assembling semiconductor devices in stacked arrangements by positioning spacers therebetween.
  47. Strid,Eric; Campbell,Richard, On-wafer test structures for differential signals.
  48. Tervo,Paul A.; Cowan,Clarence E., POGO probe card for low current measurements.
  49. Lin, Mou-Shiung; Lee, Jin-Yuan, Post passivation interconnection schemes on top of IC chip.
  50. Lin, Mou-Shiung; Lee, Jin-Yuan, Post passivation interconnection schemes on top of IC chip.
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  55. Lin, Mou-Shiung; Lee, Jin-Yuan, Post passivation interconnection schemes on top of IC chips.
  56. Lin, Mou-Shiung; Lee, Jin-Yuan, Post passivation interconnection schemes on top of the IC chips.
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  59. Buschbom, Milton Lee, Power/ground ring substrate for integrated circuits.
  60. Kister, January; Beatson, David; Laurent, Edward, Prefabricated and attached interconnect structure.
  61. Kister,January; Beatson,David; Laurent,Edward, Prefabricated and attached interconnect structure.
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  63. Hayden,Leonard; Rumbaugh,Scott; Andrews,Mike, Probe for combined signals.
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  70. Smith,Kenneth; Jolley,Michael; Van Syckel,Victoria, Probe head having a membrane suspended probe.
  71. Schwindt,Randy, Probe holder for testing of a test device.
  72. Smith, Kenneth R.; Hayward, Roger, Probing apparatus with impedance optimized interface.
  73. Smith, Kenneth R., Replaceable coupon for a probing apparatus.
  74. Higashi,Mitsutoshi, Semiconductor device having external contact terminals and method for using the same.
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  83. Gleason,K. Reed; Lesher,Tim; Strid,Eric W.; Andrews,Mike; Martin,John; Dunklee,John; Hayden,Leonard; Safwat,Amr M. E., Shielded probe with low contact resistance for testing a device under test.
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  86. Campbell, Richard, Test structure and probe for differential signals.
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  88. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
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  93. Lin, Mou-Shiung, Top layers of metal for high performance IC's.
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  95. Hayden, Leonard; Martin, John; Andrews, Mike, Wafer probe.
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  97. Hayden,Leonard; Martin,John; Andrews,Mike, Wafer probe.
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