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Method of improving copper pad adhesion 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0442497 (1999-11-18)
발명자 / 주소
  • Chen Sheng-Hsiung,TWX
출원인 / 주소
  • Taiwan Semiconductor Manufacturing Company, TWX
대리인 / 주소
    Saile
인용정보 피인용 횟수 : 54  인용 특허 : 11

초록

This invention relates to a new improved method and structure in the fabricating of aluminum metal pads. The formation special aluminum bond pad metal structures are described which improve adhesion between the tantalum nitride pad barrier layer and the underlying copper pad metallurgy by a special

대표청구항

[ What is claimed is:] [1.] A method of fabricating an integrated circuit and other devices on a substrate, the method comprising the following steps:providing a substrate;providing said substrate with a layer of dielectric, termed an interlevel dielectric (ILD) over the substrate;providing a first

이 특허에 인용된 특허 (11)

  1. Cheung Robin W. ; Lin Ming-Ren, Advanced copper interconnect system that is compatible with existing IC wire bonding technology.
  2. Hsiao Ming-Shan,TWX, Bonding pad structure and method thereof.
  3. Hong Qi-Zhong (Dallas TX) Jeng Shin-Puu (Plano TX) Havemann Robert H. (Garland TX), Diffusion barrier trilayer for minimizing reaction between metallization layers of integrated circuits.
  4. Nguyen Tue ; Hsu Sheng Teng, Low resistance contact between integrated circuit metal levels and method for same.
  5. Kim Jun K. (Seoul KRX) Lee Kyung I. (Seoul KRX), Method for forming a copper metal wiring with aluminum containing oxidation barrier.
  6. Fu Wen-Jui,TWX ; Lan Ho-Ku,TWX ; Chao Ying-Chen,TWX, Method for reducing surface leakage current on semiconductor intergrated circuits during polyimide passivation.
  7. Kim Do Heyoung,KRX, Method of fabricating metal line structure.
  8. Ming-Tsung Liu,TWX ; Hsu Bill Y. B.,TWX ; Chung Hsien-Dar,TWX ; Wu Dev-Yuan,TWX, Method of forming a bonding pad.
  9. Shiue Ruey-Yun (Hsin-Chu TWX) Wu Wen-Teng (Hsin-Chu TWX) Shieh Pi-Chen (Hsinchu TWX) Liu Chin-Kai (Hsin-Chu TWX), Method of forming bond pad structure for the via plug process.
  10. Bryant Frank R. (Denton TX) Chen Fusen E. (Milpitas CA), Semiconductor bond pad structure and method.
  11. Anschel Morris (Wappingers Falls NY) Ormond Douglas W. (Wappingers Falls NY) Hayunga Carl P. (Poughkeepsie NY), Thin film metallization process for improved metal to substrate adhesion.

이 특허를 인용한 특허 (54)

  1. Wang, Chung Yu; Lee, Chien-Hsiun, Aluminum cap for reducing scratch and wire-bond bridging of bond pads.
  2. Tsai, Chen-Wen; Wu, Chung-Ju; Lin, Wei-Feng, Bond pad structure and its method of fabricating.
  3. Huang,Tai Chun; Lee,Tze Liang, Bonding pad and via structure design.
  4. Lee,Date Gun, Bonding pad of a semiconductor device and formation method thereof.
  5. Lai, Yu-Chia; Yu, Chen-Hua; Huang, Chang-Pin; Liu, Chung-Shi; Tu, Hsien-Ming; Kuo, Hung-Yi; Tsai, Hao-Yi; Liang, Shih-Wei; Liu, Ren-Xuan, Conductive terminal on integrated circuit.
  6. Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; Mian, Michael; Drury, Robert, Conductive trace with reduced RF impedance resulting from the skin effect.
  7. Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; Mian, Michael; Drury, Robert, Conductive trace with reduced RF impedance resulting from the skin effect.
  8. Hébert, François; Bhalia, Anup, Copper bonding compatible bond pad structure and method.
  9. Hébert, François; Bhalla, Anup, Copper bonding method.
  10. Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; Mian, Michael; Drury, Robert, Dual damascene metal trace with reduced RF impedance resulting from the skin effect.
  11. Chen, Ken; Huang, Chender; Tsao, Pei-Haw; Wang, Jones; Huang, Hank, Enhanced adhesion strength between mold resin and polyimide.
  12. Chen,Ken; Huang,Chender; Tsao,Pei Haw; Wang,Jones; Huang,Hank, Enhanced adhesion strength between mold resin and polyimide.
  13. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
  14. Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
  15. Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; Mian, Michael; Drury, Robert, Etched metal trace with reduced RF impendance resulting from the skin effect.
  16. Ryan,Vivian, Integrated circuit having bond pad with improved thermal and mechanical properties.
  17. Angell,David; Beaulieu,Frederic; Hisada,Takashi; Kelly,Adreanne; McKnight,Samuel Roy; Miyai,Hiromitsu; Petrarca,Kevin Shawn; Sauter,Wolfgang; Volant,Richard Paul; Weinstein,Caitlin W., Internally reinforced bond pads.
  18. Rhodes,Howard E., Local multilayered metallization.
  19. Rhodes,Howard E., Local multilayered metallization.
  20. Hopper, Peter J.; Johnson, Peter; Hwang, Kyuwoon; Mian, Michael; Drury, Robert, Metal trace with reduced RF impedance resulting from the skin effect.
  21. Pozder,Scott K.; Kobayashi,Thomas S., Method for forming a bond pad interface.
  22. Matsushima, Fumiaki; Ota, Tsutomu; Makabe, Akira, Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument.
  23. Matsushima,Fumiaki; Ota,Tsutomu; Makabe,Akira, Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument.
  24. Pozder, Scott K.; Kobayashi, Thomas S., Method for forming a semiconductor device having a mechanically robust pad interface.
  25. Wolf, Robert K.; Fu, Hui, Method for improving heat dissipation in optical transmitter.
  26. Lee,Jin Hyuk; Kim,Gu Sung; Lee,Dong Ho; Jang,Dong Hyeon, Method for manufacturing a wafer level chip scale package.
  27. Maier, Hubert; Detzel, Thomas, Method for producing bonding connection of semiconductor device.
  28. Hopper,Peter J.; Johnson,Peter; Hwang,Kyuwoon; Mian,Michael; Drury,Robert, Method of forming a dual damascene metal trace with reduced RF impedance resulting from the skin effect.
  29. Hopper,Peter J.; Johnson,Peter; Hwang,Kyuwoon; Mian,Michael; Drury,Robert, Method of forming a metal trace with reduced RF impedance resulting from the skin effect.
  30. Hopper,Peter J.; Johnson,Peter; Hwang,Kyuwoon; Mian,Michael; Drury,Robert, Method of forming an etched metal trace with reduced RF impedance resulting from the skin effect.
  31. Lee, Byung Zu; Kim, Hyun Yong, Method of forming copper wire on semiconductor device.
  32. Briggs, Benjamin D.; Clevenger, Lawrence A.; Rizzolo, Michael; Yang, Chih-Chao, Neutral atom beam nitridation for copper interconnect.
  33. Briggs, Benjamin D.; Clevenger, Lawrence A.; Rizzolo, Michael; Yang, Chih-Chao, Neutral atom beam nitridation for copper interconnect.
  34. Hunter, Stevan G.; Rasmussen, Bryce A.; Ruud, Troy L., Pad over interconnect pad structure design.
  35. Ellis, Timothy W.; Murdeshwar, Nikhil; Eshelman, Mark A.; Rheault, Christian, Semiconductor copper bond pad surface protection.
  36. Hatano, Masaaki; Usui, Takamasa, Semiconductor device.
  37. Chen, Chun-Liang, Semiconductor device allowing metal layer routing formed directly under metal pad.
  38. Chen, Chun-Liang, Semiconductor device allowing metal layer routing formed directly under metal pad.
  39. Chen, Chun-Liang; Chang, Tien-Chang; Lin, Chien-Chih, Semiconductor device allowing metal layer routing formed directly under metal pad.
  40. Chen, Chun-Liang; Chang, Tien-Chang; Lin, Chien-Chih, Semiconductor device allowing metal layer routing formed directly under metal pad.
  41. Chen, Chun-Liang; Chang, Tien-Chang; Lin, Chien-Chih, Semiconductor device allowing metal layer routing formed directly under metal pad.
  42. Marimuthu, Pandi C.; Lin, Yaojian; Chen, Kang; Gu, Yu; Choi, Won Kyoung, Semiconductor device and method of forming a PoP device with embedded vertical interconnect units.
  43. Burrell, Lloyd G.; Wong, Kwong H.; Kelly, Adreanne A.; McKnight, Samuel R., Semiconductor device having a composite layer in addition to a barrier layer between copper wiring and aluminum bond pad.
  44. Kobayashi, Thomas S.; Sheck, Stephen G.; Pozder, Scott K., Semiconductor device having a fuse and method of forming thereof.
  45. Yamada, Yukiko, Semiconductor device with a diffusion barrier film having a spacing for stress relief of solder bump.
  46. Morozumi, Yukio, Semiconductor devices and methods for manufacturing semiconductor devices.
  47. Yukio Morozumi JP, Semiconductor devices and methods for manufacturing semiconductor devices.
  48. Morozumi, Yukio, Semiconductor devices and methods for manufacturing the same.
  49. Yukio Morozumi JP, Semiconductor devices and methods for manufacturing the same.
  50. Lin, Yaojian; Marimuthu, Pandi C.; Chen, Kang; Gu, Yu, Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units.
  51. Lin, Yaojian; Chen, Kang; Gu, Yu; Marimuthu, Pandi Chelvam, Semiconductor method and device of forming a fan-out device with PWB vertical interconnect units.
  52. Murayama, Kei, Semiconductor package.
  53. Murayama, Kei, Semiconductor package.
  54. Leong, Kum Foo; Tai, Siew Fong; Chung, Chee Key, Solder interface locking using unidirectional growth of an intermetallic compound.
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