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특허 상세정보

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내보내기 페이스북 공유 카카오톡 공유

Leadless chip carrier design and structure

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H01L-023/10   
미국특허분류(USC) 257/706 ; 257/698 ; 257/700 ; 257/707
출원번호 US-0252851 (1999-02-17)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Snell & Wilmer L.L.P.
인용정보 피인용 횟수 : 31  인용 특허 : 7
초록
▼

A semiconductor device is provided in the form of a chip carrier (e.g., chip/IC scale carrier for RF applications) that includes an integrated circuit chip attached to a die attach pad. The device has an interconnect substrate having an upper surface and a lower surface, with a plurality of vias passing through the thickness of the interconnect substrate from the upper surface to the lower surface. The die attach pad is located on the upper surface of the interconnect substrate, and a heat spreader is located on the lower surface of the interconnect subs...

대표
청구항
▼

[ We claim:] [1.] An electronic package for a device, comprising:an interconnect substrate having an upper surface and a lower surface;a die attach pad on said upper surface for receiving a semiconductor device chip;a heat spreader on said lower surface, said heat spreader positioned beneath said die attach pad;a plurality of vias passing through a thickness of said interconnect substrate from said upper surface to said lower surface;a first group of said vias positioned to intersect both said die attach pad and said heat spreader;a second group of said ...

이 특허에 인용된 특허 (7)

  1. Selna Erich (Mountain View CA). Ball grid array package for a integrated circuit. USP1997065640048.
  2. Celaya Phillip C. ; Kerr John R.. Electronic component assembly having an encapsulation material and method of forming the same. USP1998095808873.
  3. Palmer Mark J.. Integrated circuit package with a plurality of vias that are electrically connected to an internal ground plane and ther. USP1998025721454.
  4. Miyagi Takeshi (Fujisawa JPX) Matsumoto Kazuhiro (Yokohama JPX) Sasaki Tomiya (Yokohama JPX) Iwasaki Hideo (Kawasaki JPX) Hisano Katsumi (Yokohama JPX). Multi-layer substrate. USP1996045506755.
  5. Katchmar Roman (Ottawa CAX). Printed circuit board and heat sink arrangement. USP1997075646826.
  6. Inoue Kazuaki,JPX ; Yamashita Hiroyuki,JPX ; Nakamura Norio,JPX ; Yoda Hiroyuki,JPX. Semiconductor device for heat discharge. USP1999075923084.
  7. Gaku Morio,JPX ; Ikeguchi Nobuyuki,JPX ; Kobayashi Toshihiko,JPX. Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package. USP2000086097089.

이 특허를 인용한 특허 피인용횟수: 31

  1. Hackitt,Dale; Nickerson,Robert; Taggart,Brian. Bottom heat spreader. USP2007037190068.
  2. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng. Chip structure and process for forming the same. USP2011088008776.
  3. Lee, Jin-Yuan; Lin, Mou-Shiung; Huang, Ching-Cheng. Chip structure and process for forming the same. USP2013108546947.
  4. Vinson, Robert S.; Brief, Joseph B.; Beck, Donald J.; Jandzio, Gregory M.. Decoupling capacitor closely coupled with integrated circuit. USP2010047705450.
  5. Vinson, Robert S.; Brief, Joseph B.; Beck, Donald J.; Jandzio, Gregory M.. Decoupling capacitor closely coupled with integrated circuit. USP2010017642131.
  6. Vinson, Robert S.; Brief, Joseph B.; Beck, Donald J.; Jandzio, Gregory M.. Decoupling capacitor closely coupled with integrated circuit. USP2004036700794.
  7. Vinson,Robert S.; Brief,Joseph B.; Beck,Donald J.; Jandzio,Gregory M.. Decoupling capacitor closely coupled with integrated circuit. USP2006127145233.
  8. Schaefer, Harald. Device and method for determining the temperature of a heat sink. USP2018059967966.
  9. Chiang,Wen Jung; Chen,Chien Te; Wang,Yu Po. High electrical performance semiconductor package. USP2008047361846.
  10. Masaaki Okada JP. High-density mounted device employing an adhesive sheet. USP2002066411518.
  11. Chen, James; Wang, Rong-Huei. Image sensor semiconductor package with castellation. USP2004026686667.
  12. Brian R. Hutchison ; Matthew Schwiebert ; Robert J. Thompson. Integral dielectric heatspreader. USP2002076414847.
  13. Hashemi, Hassan S.. Leadless chip carrier design and structure. USP2005076921972.
  14. Megahed, Mohamed; Hashemi, Hassan S.. Leadless chip carrier with embedded inductor. USP2004036710433.
  15. Hashemi, Hassan S.. Leadless flip chip carrier design and structure. USP2003086611055.
  16. Lee,Kong Weng; Ng,Kee Yean; Kuan,Yew Cheong; Tan,Gin Ghee; Tan,Cheng Why. Method for fabricating a packaging device for semiconductor die and semiconductor device incorporating same. USP2007107279355.
  17. Sharma, Nirmal K.. Package for integrated circuit with thermal vias and method thereof. USP2004106809416.
  18. Sharma, Nirmal K.. Package for integrated circuit with thermal vias and method thereof. USP2005036861283.
  19. Lee,Kong Weng; Ng,Kee Yean; Kuan,Yew Cheong; Tan,Gin Ghee; Tan,Cheng Why. Packaging device for semiconductor die, semiconductor device incorporating same and method of making same. USP2007087256486.
  20. Toh, Chin Hock; Sun, Yi Sheng Anthony; Zhang, Xue Ren; Kolan, Ravi Kanth. Packaging structural member. USP2017079704726.
  21. Ernst, Georg; Zeiler, Thomas. Semiconductor component having a chip carrier with openings for making contact. USP2003036528877.
  22. Hotta, Yuji; Yamaguchi, Miho; Matsumura, Akiko. Semiconductor device and circuit board for mounting semiconductor element. USP2003036538309.
  23. Lee, Kong Weng; Ng, Kee Yean; Kuan, Yew Cheong; Tan, Cheng Why; Tan, Gin Ghee. Semiconductor device with a light emitting semiconductor die. USP2015099123869.
  24. Choi, Soung-yong; Park, Min-hyo. Semiconductor package form within an encapsulation. USP2010067728437.
  25. Choi, Seung-yong; Park, Min-hyo. Semiconductor package formed within an encapsulation. USP2012058168475.
  26. Lopez, Jerome. Semiconductor package with a chip on a support plate. USP2010117838417.
  27. Lopez, Jérôme. Semiconductor package with a chip on a support plate. USP2009087573141.
  28. Hashemi, Hassan S.; Cote, Kevin. Structure and method for fabrication of a leadless chip carrier. USP2005116960824.
  29. Coccioli, Roberto; Megahed, Mohamed; Hashemi, Hassan S.. Structure and method for fabrication of a leadless chip carrier with embedded antenna. USP2003066582979.
  30. Hashemi, Hassan S.; Cote, Kevin J.. Structure and method for fabrication of a leadless multi-die carrier. USP2005036867493.
  31. Xing, Andrew. System and method for mounting a stack-up structure. USP2003026519157.

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