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Multi-function chamber for a substrate processing system

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • F27D-003/06
출원번호 US-0502117 (2000-02-10)
발명자 / 주소
  • White John M.
  • Blonigan Wendell T.
  • Richter Michael W.
출원인 / 주소
  • Applied Komatsu Technology, Inc., JPX
대리인 / 주소
    Thomason, Moser & Patterson, LLP
인용정보 피인용 횟수 : 22  인용 특허 : 31

초록

A load lock chamber includes a chamber body having an aperture to allow a substrate to be transferred into or out of the chamber. The load lock chamber is configurable in several configurations, including a base configuration for providing a transition between two different pressures, a heating conf

대표청구항

[What is claimed is:] [1.]a chamber body having an aperture to allow a substrate to be transferred into or out of the chamber;wherein the chamber is configurable using removable components in at least two of the following configurations: a base configuration for providing a transition between two di

이 특허에 인용된 특허 (31)

  1. White John M. (Hayward CA) Berkstresser David E. (Los Gatos CA) Petersen Carl T. (Fremont CA), Alignment of a shadow frame and large flat substrates on a heated support.
  2. White John M. (2811 Colony View Pl. Hayward CA 94541) Berkstresser David E. (19311 Bear Creek Rd. Los Gatos CA 95030) Petersen Carl T. (1185 Gilbert Ct. Fremont CA 94536), Alignment of a shadow frame and large flat substrates on a support.
  3. Prentakis Antonios E. (Cambridge MA), Apparatus and method for loading and unloading wafers.
  4. Hirasawa Shigeki (Ibaraki) Torii Takuji (Ushiku) Watanabe Tomoji (Ibaraki) Komatsu Toshihiro (Ibaraki) Honma Kazuo (Ibaraki) Sakai Akihiko (Ibaraki) Takagaki Tetsuya (Tokorozawa) Uchino Toshiyuki (To, Apparatus and method for performing heat treatment on semiconductor wafers.
  5. Sugimoto Kenji (Kyoto JPX), Apparatus for treating the surfaces of wafers.
  6. MacLeish Joseph H. ; Mailho Robert D., CVD reactor having heated process chamber within isolation chamber.
  7. Van Mastrigt Max (San Jose CA), Chemical vapor deposition apparatus.
  8. Chizinsky George (143 West St. Beverly Farms MA 01915), Heated plate rapid thermal processor.
  9. Chizinsky George (143 West St. Beverly Farms MA 01915), Heated plate rapid thermal processor.
  10. Mishina Haruo,JPX ; Imaisumi Kiyoshi,JPX ; Yamama Shinya,JPX, Heating furnace.
  11. Coleman John H. (Locust Valley NY), Method of forming semiconducting materials and barriers using a dual enclosure apparatus.
  12. Coleman John H. (Locust Valley NY), Method of forming semiconducting materials and barriers using a multiple chamber arrangement.
  13. Turner Norman L. (Mountain View CA) White John MacNeill (Los Gatos CA) Berkstresser David (Los Gatos CA), Method of heating and cooling large area glass substrates.
  14. Turner Norman L. (Mountain View CA) White John M. (Los Gatos CA) Berkstresser David (Los Gatos CA), Method of heating and cooling large area substrates and apparatus therefor.
  15. Yamabe Kikuo (Yokohama JPX) Okumura Katsuya (Yokohama JPX), Method of thermally processing semiconductor wafers and an apparatus therefor.
  16. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
  17. Namiki Minoru (Fuchu JPX) Takahashi Nobuyuki (Fuchu JPX), Multi-chamber integrated process system.
  18. Ozawa Masahito (Yamanashi JPX) Mizukami Masami (Yamanashi JPX) Kanazashi Masanobu (Kofu JPX) Takasoe Toshihiko (Yamanashi JPX) Narushima Masaki (Yamanashi JPX) Kubodera Masao (Yamanashi JPX), Multi-chamber system provided with carrier units.
  19. Muka Richard S. (Topsfield MA), Passive gas substrate thermal conditioning apparatus and method.
  20. Yano Kensaku (Kanagawa JPX) Furukawa Akihiko (Tokyo JPX) Miyagawa Ryohei (Kanagawa JPX) Iida Yoshinori (Tokyo JPX), Photo chemical reaction apparatus.
  21. Schmitt Jacques (La Ville Du Bois FRX), Process and means for producing films for use in electronics and/or optoelectronics using plasma.
  22. Lee Chunghsin (Lynnfield MA), Rapid thermal furnace for semiconductor processing.
  23. Ozias Albert E. (Aumsville OR), Reaction chambers for CVD systems.
  24. Grunes Howard (Santa Cruz CA) Tepman Avi (Cupertino CA) Lowrance Robert (Los Gatos CA), Robot assembly.
  25. Moslehi Mehrdad M. (Palo Alto CA) Saraswat Krishna C. (Santa Clara County CA), Thermal/microwave remote plasma multiprocessing reactor and method of use.
  26. Lowrance Robert B. (Los Gatos CA), Two-axis magnetically coupled robot.
  27. Lowrance Robert B. (Los Gatos CA), Two-axis magnetically coupled robot.
  28. Lowrance Robert B. (Los Gatos CA), Two-axis magnetically coupled robot.
  29. Kato Susumu (Isawa-Cho JPX) Yamaguchi Hirofumi (Sudama-Cho JPX), Vacuum process apparaus.
  30. Turner Norman L. (Mountain View CA) White John M. (Hayward CA), Vacuum processing apparatus having improved throughput.
  31. Dorenbos Frederick William (El Cerrito CA), Workpiece handling system for vacuum processing.

이 특허를 인용한 특허 (22)

  1. Lee,Jae Chull; Berkstresser,David, Curved slit valve door with flexible coupling.
  2. Lee, Jae-Chull; Kurita, Shinichi; White, John M.; Anwar, Suhail, Decoupled chamber body.
  3. Kurita, Shinichi; Blonigan, Wendell T., Double dual slot load lock chamber.
  4. Kurita, Shinichi; Blonigan, Wendell T.; Hosokawa, Akihiro, Dual substrate loadlock process equipment.
  5. Kurita, Shinichi; Blonigan, Wendell T.; Hosokawa, Akihiro, Dual substrate loadlock process equipment.
  6. Tetsuya Oda JP; Mitsuhiro Tanoue JP; Toshichika Takei JP, Hot plate cooling method and heat processing apparatus.
  7. William Tom Batchelder, In-line cure furnace and method for using the same.
  8. Kurita, Shinichi; Blonigan, Wendell T.; Tanase, Yoshiaki, Large area substrate transferring method for aligning with horizontal actuation of lever arm.
  9. Pokharna, Himansu; Xia, Li-Qun; Lim, Tian H., Lid cooling mechanism and method for optimized deposition of low-K dielectric using TR methylsilane-ozone based processes.
  10. Kurita,Shinichi; Blonigan,Wendell T.; Tanase,Yoshiaki, Load lock chamber for large area substrate processing system.
  11. Kurita,Shinichi; Blonigan,Wendell T., Load lock chamber having two dual slot regions.
  12. Lee, Jae-Chull; Anwar, Suhail; Kurita, Shinichi, Load lock chamber with decoupled slit valve door seal compartment.
  13. Tai, Po nan; Chen, Ching yun; Cheng, Hung wei, Method for conveying and apparatus using the same.
  14. Kurita,Shinichi; Blonigan,Wendell T., Method for transferring substrates in a load lock chamber.
  15. Bachrach, Robert Z., Method of achieving high productivity fault tolerant photovoltaic factory with batch array transfer robots.
  16. Bachrach,Robert Z., Method of achieving high productivity fault tolerant photovoltaic factory with batch array transfer robots.
  17. Kurita, Shinichi; Anwar, Suhail; Lee, Jae-Chull, Multiple slot load lock chamber and method of operation.
  18. Tsukamoto, Yuji; Hamelin, Thomas; Kudo, Yasuhisa, Post-etch treatment system for removing residue on a substrate.
  19. Jae Yun Lee ; Lovell C. Chase, III, Process chamber assembly with reflective hot plate and pivoting lid.
  20. Probst, Volker, Processing device for producing semiconductor layers and coated substrates treated with elemental selenium and/or sulphur.
  21. Park,Yong Seok; Kim,Sang Ho; Jo,Han beom, Substrate floating apparatus and method of manufacturing liquid crystal display apparatus using the same.
  22. Kim, Sam Hyungsam; Lee, Jae-Chull; Sterling, William N.; Brown, Paul, Valve door with ball coupling.
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