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특허 상세정보

Mapping heterogeneous logic elements in a programmable logic device

국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) G06F-017/50   
미국특허분류(USC) 716/018 ; 716/016
출원번호 US-0169213 (1998-10-09)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Beyer Weaver & Thomas, LLP
인용정보 피인용 횟수 : 79  인용 특허 : 4
초록

A method and mechanism for mapping heterogeneous logic elements in a portion of electronic design compilation for a programmable integrated circuit is disclosed. Specifically, the invention provides a method to perform the technology mapping of heterogeneous logic elements in a programmable logic device such as selectively choosing the best combination of product term logic elements and look up table logic elements.

대표
청구항

[What is claimed is:] [1.](a) forming a first logical region using the first type logic element;(b) forming a second logical region using the second type logic element, wherein the first logical region and the second logical region perform logically equivalent sub-functions of the electronic design;(c) comparing the first and the second logical regions;(d) choosing either the first logical region or the second logical region based upon the comparing (c);(e) adding the chosen logical region from operation (d) to a final mapping list; and(f) repeating oper...

이 특허를 인용한 특허 피인용횟수: 79

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