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Method for attaching a die to a carrier utilizing an electrically nonconductive layer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0451154 (1999-11-30)
발명자 / 주소
  • Boyle John J.
  • Robbins William L.
출원인 / 주소
  • The Charles Stark Draper Laboratory, Inc.
대리인 / 주소
    McDermott, Will & Emery
인용정보 피인용 횟수 : 7  인용 특허 : 24

초록

An integrated circuit (IC) die carrier assembly includes a thinned IC die mounted to a substrate or carrier. The IC die is mounted to the carrier via a thin layer of glass. The carrier facilitates fixturing and provides support during the lapping process used to thin the die. Ball bonding, wire bond

대표청구항

[What is claimed is:] [1.]A) attaching ball bonding balls to conductive pads on a first side of said integrated circuit die;B) applying a electrical non-conductive a mounting material to said first side of said integrated circuit die, said mounting material being substantially unsusceptible to outga

이 특허에 인용된 특허 (24)

  1. Weger William C. (Wylie TX), Ceramic wall hybrid package with washer and solid metal through wall leads.
  2. Yoon Jee Sung,KRX ; Yun Hyeong Ik,KRX, Charge-coupled device with photo chromic layer.
  3. Kameishi Wataru (Ootawara JPX), Compact imaging apparatus for electronic endoscope with improved optical characteristics.
  4. Annegarn Joseph Johannes Maria (1 Walsh Road ; Kilfenora Benoni ; Transvaal ZA), Descaling bent rod with separated cleaning particles.
  5. Baker Robert Grover ; Bertin Claude Louis ; Howell Wayne John ; Mosley Joseph Michael, Electronic modules with integral sensor arrays.
  6. Carichner Karla (Pleasanton CA), Improved laminate package for an integrated circuit and integrated circuit having such a package.
  7. Boyle John J. ; Robbins William L., Intergrated circuit die assembly.
  8. Butt Sheldon H. (Godfrey IL) Mahulikar Deepak (Meriden CT), Metal packages having improved thermal dissipation.
  9. Schroeder Jack A. (Scottsdale AZ) Winkler Ernel R. (Mesa AZ), Metallization and bonding means and method for VLSI packages.
  10. Zollo James A. (Plantation FL) Doutre Barbara R. (Plantation FL) Yorio Rudy (Boca Raton FL), Method and assembly for mounting an electronic device having an optically erasable surface.
  11. Dietz Raymond L. (Poway CA) Featherby Michael (San Diego CA) Margetts Peter K. (El Cajon CA), Method of bonding an electronic device to a ceramic substrate.
  12. Kondou Yuu (Kanagawa JPX) Izumi Mamoru (Tokyo JPX), Miniaturized solid state imaging device.
  13. Glenn Thomas P., Mounting for a semiconductor integrated circuit device.
  14. Glenn Thomas P., Mounting having an aperture cover with adhesive locking feature for flip chip optical integrated circuit device.
  15. Bigler Robert R. (Moorestown NJ) Goldfarb Samuel (Princeton NJ), Package for solid state image sensors.
  16. Baker Robert Grover ; Bertin Claude Louis ; Howell Wayne John ; Mosley Joseph Michael, Packaged electronic module and integral sensor array.
  17. Segawa Masao,JPX ; Ooi Kazushige,JPX ; Kimura Masanobu,JPX ; Sugi Shuichi,JPX, Photoelectric converting device with anisotropically conductive film for connecting leads of wiring board and electrode.
  18. Hiraiwa Katsuro (Kawasaki JPX), Process for sealing a semiconductor device.
  19. Kunimatsu Yasuyoshi,JPX, Semiconductor device having a capacitor formed on a surface of a closure.
  20. Kunimatsu Yasuyoshi,JPX ; Furuzawa Akira,JPX ; Sata Akifumi,JPX, Semiconductor device with a decoupling capacitor mounted thereon having a thermal expansion coefficient matched to the d.
  21. Dietz Raymond L. (Poway CA) Featherby Michael (San Diego CA) Margetts Peter K. (El Cajon CA), Silver-filled glass.
  22. Dietz Raymond L. (Poway CA) Featherby Michael (San Diego CA) Margetts Peter K. (El Cajon CA), Silver-filled glass.
  23. Husson ; Jr. Frank D. (San Diego CA) Walter Kathleen E. (San Diego CA), Silver-glass paste for attachment of silicon die to ceramic substrate.
  24. Husson ; Jr. Frank D. (San Diego CA) Walter Kathleen E. (La Jolla CA), Silver-glass paste with poly-modal flake size distribution and quick dry vehicle.

이 특허를 인용한 특허 (7)

  1. Nagarajan, Kumar; Kutlu, Zafer; Shah, Shirish, Balanced coefficient of thermal expansion for flip chip ball grid array.
  2. Winther, Kaspar Tobias, Bonding of parts with dissimilar thermal expansion coefficients.
  3. Sanchez,Audel A.; Kim,Taek K., Method of assembling a semiconductor component and apparatus therefor.
  4. Karlinski, Haggai; Fisher, Gil; Nathan, Roi; Weiss, Ilan, Print head with reduced bonding stress and method.
  5. Karlinski, Haggai; Fisher, Gil; Nathan, Roi; Weiss, Ilan, Print head with reduced bonding stress and method.
  6. Tim Sammon GB, Semiconductor device package and lead frame with die overhanging lead frame pad.
  7. Kumar Nagarajan ; Sarathy Rajagopalan, Thin form factor flip chip ball grid array.
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