$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

High performance active gate drive for IGBTs 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-005/12
출원번호 US-0276417 (1999-03-25)
발명자 / 주소
  • John Vinod
  • Suh Bum-Seok,KRX
  • Lipo Thomas Anthony
출원인 / 주소
  • Wisconsin Alumni Research Corporation
대리인 / 주소
    Foley & Lardner
인용정보 피인용 횟수 : 36  인용 특허 : 4

초록

An active drive circuit for high power IGBTs provides optimized switching performance for both turn-on and turn-off by incorporating a three-stage action to improve performance characteristics. The gate drive circuit includes a semiconductor switch such as a MOSFET connected in series with a low res

대표청구항

[What is claimed is:] [1.](a) turn-on switch means for providing low resistance rapid charging of the gate of an IGBT;(b) turn-on controlled current means for providing controlled current charging of the gate of the IGBT; and(c) means for turning on the turn-on switch means to provide low resistance

이 특허에 인용된 특허 (4)

  1. Kuo James R. (Cupertino CA), CMOS bus and transmission line driver having programmable edge rate control.
  2. Samani Davoud (Saint Martin Le Vinoux FRX), Combined CMOS and NPN output pull-up circuit.
  3. Asprey Thomas A. (Boulder CO), Process compensating variable impedence I/O driver with feedback.
  4. Tanaka Yasunori (Yokohama JPX), Slew-rate limited output driver having reduced switching noise.

이 특허를 인용한 특허 (36)

  1. Xu, Zhuxian; Chen, Chingchi, Active gate clamping for inverter switching devices using grounded gate terminals.
  2. Keller, Daren W.; Andrews, John T., Apparatus related to an inductive switching test.
  3. Mourrier, Andre; Thevenet, Kevin, DC brushed motor drive with circuit to reduce di/dt and EMI, for MOSFET Vth detection, voltage source detection, and overpower protection.
  4. Nakamori, Akira; Oyabe, Kazunori, Drive circuit for insulated gate device.
  5. Nakamori, Akira; Mori, Takahiro; Yamazaki, Tomoyuki, Driver circuit.
  6. Lu, Xi; Chen, Chingchi; Xu, Zhuxian; Zou, Ke, Dual mode IGBT gate drive to reduce switching loss.
  7. Maloyan,Shahin; Dubhashi,Ajit, Gate control circuit for prevention of turn-off avalanche of power MOSFETs.
  8. Wagoner, Robert Gregory; Greenleaf, Todd David, Gate drive circuit and method of operating same.
  9. Dorin O. Neacsu ; Hoa Huu Nguyen, Gate drive circuit with feedback-controlled active resistance.
  10. Laschek-Enders, Andreas, Gate driver that drives with a sequence of gate resistances.
  11. Laschek-Enders, Andreas, Gate driver that drives with a sequence of gate resistances.
  12. Bennett, Paul George, Half sine wave resonant drive circuit.
  13. Meng, Pon Tiam; Siew, Tai Chee, High di/dt capacity measurement hardware.
  14. Wagoner, Robert Gregory; Ritter, Allen Michael; Schnetzka, Harold Robert, High performance IGBT gate drive.
  15. Nadig,Srikrishna H.; Coelho,Godfree, Identification of average total loss and switching loss in duty cycle and/or frequency variation signals acquired across a switching device using a DSO.
  16. Sicard, Thierry; Perruchoud, Philippe, Method and apparatus for driving a power transistor gate.
  17. Lee, Chungyeol Paul, Method and system for a power switch with a slow in-rush current.
  18. Berkhout, Marco, Power amplifier.
  19. Sawada, Takashi; Saito, Masao, Power module and output circuit.
  20. Yedinak, Joseph A.; Gladish, Jon; Shekhawat, Sampat; Dolny, Gary M.; Shenoy, Praveen Muraleedharan; Lange, Douglas Joseph; Rinehimer, Mark L., Quick punch through IGBT having gate-controllable DI/DT and reduced EMI during inductive turn off.
  21. Yedinak, Joseph A.; Rinehimer, Mark L.; Grebs, Thomas E.; Benjamin, John L., Reduced process sensitivity of electrode-semiconductor rectifiers.
  22. Yedinak, Joseph A.; Rinehimer, Mark L.; Grebs, Thomas E.; Benjamin, John L., Reduced process sensitivity of electrode-semiconductor rectifiers.
  23. Yedinak, Joseph; Rinehimer, Mark; Grebs, Thomas E.; Benjamin, John, Semiconductor devices with stable and controlled avalanche characteristics and methods of fabricating the same.
  24. Pattantyus,Tom I., Soft IGBT turn-on ignition applications.
  25. Zoels, Thomas Alois; Mari Curbelo, Alvaro Jorge; Garcia Clemente, Miguel, System and method for driving a power switch.
  26. Yedinak, Joseph A.; Calafut, Daniel; Probst, Dean E., Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  27. Yedinak, Joseph A.; Calafut, Daniel; Probst, Dean E., Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  28. Yedinak, Joseph A.; Challa, Ashok, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  29. Yedinak, Joseph A.; Challa, Ashok, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  30. Yedinak, Joseph A.; Challa, Ashok; Kinzer, Daniel M.; Probst, Dean E., Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  31. Yedinak, Joseph A.; Challa, Ashok; Kinzer, Daniel M.; Probst, Dean E.; Calafut, Daniel, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  32. Yedinak, Joseph A.; Challa, Ashok; Kinzer, Daniel M.; Probst, Dean E.; Calafut, Daniel, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  33. Yedinak, Joseph A.; Challa, Ashok; Probst, Dean, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  34. Yedinak, Joseph A.; Probst, Dean E.; Calafut, Daniel, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  35. Yedinak, Joseph A.; Probst, Dean E.; Challa, Ashok; Calafut, Daniel, Trench-based power semiconductor devices with increased breakdown voltage characteristics.
  36. Grebs, Thomas E.; Rinehimer, Mark; Yedinak, Joseph; Probst, Dean E.; Dolny, Gary; Benjamin, John, Trench-shielded semiconductor device.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로