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Semiconductor substrate and thin film semiconductor device, method of manufacturing the same, and anodizing apparatus 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/46
출원번호 US-0215314 (1998-12-18)
우선권정보 JP0360428 (1997-12-26)
발명자 / 주소
  • Matsushita Takeshi,JPX
  • Kusunoki Misao,JPX
  • Tatsumi Takaaki,JPX
출원인 / 주소
  • Sony Corporation, JPX
대리인 / 주소
    Sonnenschein, Nath & Rosenthal
인용정보 피인용 횟수 : 64  인용 특허 : 6

초록

A semiconductor substrate, a thin film semiconductor device, a manufacturing method thereof and an anodizing apparatus which can reduce the manufacturing cost and save the resources are provided. According to this invention, a semiconductor thin film is formed through a separation layer of a porous

대표청구항

[ What is claimed is:] [1.]1. A method of separating a semiconductor film comprising the steps of:forming a first semiconductor layer on a sapphire substrate, the first semiconductor layer comprising a first layer having a first impurity concentration and a second layer having a second impurity conc

이 특허에 인용된 특허 (6)

  1. Whitehead Lorne A. (Vancouver CAX), Electro-chemical etch device.
  2. Ichinose Hirofumi,JPX ; Sawayama Ippei,JPX ; Hasebe Akio,JPX ; Murakami Tsutomu,JPX ; Hisamatsu Masaya,JPX ; Shinkura Satoshi,JPX ; Ueno Yukie,JPX, Etching method and process for producing a semiconductor element using said etching method.
  3. Sato Nobuhiko,JPX ; Yonehara Takao,JPX ; Sakaguchi Kiyofumi,JPX, Method for producing semiconductor substrate.
  4. Matsushita Takeshi,JPX ; Tayanaka Hiroshi,JPX, Method for separating a device-forming layer from a base body.
  5. Sakaguchi Kiyofumi,JPX ; Yonehara Takao,JPX ; Atoji Tadashi,JPX, Method of manufacturing semiconductor article.
  6. Pogge ; Hans Bernhard, Total dielectric isolation utilizing a combination of reactive ion etching, anodic etching, and thermal oxidation.

이 특허를 인용한 특허 (64)

  1. Iwasaki, Yukiko; Nishida, Shoji; Sakaguchi, Kiyofumi; Ukiyo, Noritaka, Anodizing apparatus.
  2. Francois J. Henley ; Michael A. Brayan ; William G. En, Cleaving process to fabricate multilayered substrates using low implantation doses.
  3. Henley,Francois J.; Bryan,Michael A.; En,William G., Cleaving process to fabricate multilayered substrates using low implantation doses.
  4. Francois J. Henley ; Nathan Cheung, Controlled cleavage process and device for patterned films.
  5. Henley, Francois J.; Cheung, Nathan, Controlled cleavage process and device for patterned films.
  6. Francois J. Henley ; Nathan W. Cheung, Controlled cleavage process and resulting device using beta annealing.
  7. Henley, Francois J.; Cheung, Nathan, Controlled cleavage process using pressurized fluid.
  8. Henley,Francois J.; Cheung,Nathan W., Controlled cleaving process.
  9. Henley,Francois J.; Cheung,Nathan W., Controlled cleaving process.
  10. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  11. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  12. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
  13. Henley,Francois J.; Cheung,Nathan W., Controlled process and resulting device.
  14. Fonash,Stephen J.; Nam,Wook Jun; Lee,Youngchul; Chang,Kyuhwan; Hayes,Daniel J.; Kalkan,A. Kaan; Bae,Sanghoon, Deposited thin films and their use in separation and sacrificial layer applications.
  15. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  16. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  17. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  18. Letertre, Fabrice; Ghyselen, Bruno; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle, Fabrication of substrates with a useful layer of monocrystalline semiconductor material.
  19. Adam, Thomas N.; Cheng, Kangguo; Doris, Bruce B.; Hashemi, Pouya; Khakifirooz, Ali; Reznicek, Alexander, Formation of bulk SiGe fin with dielectric isolation by anodization.
  20. Adam, Thomas N.; Cheng, Kangguo; Doris, Bruce B.; Hashemi, Pouya; Khakifirooz, Ali; Reznicek, Alexander, Formation of bulk SiGe fin with dielectric isolation by anodization.
  21. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.
  22. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.
  23. Czagas, Joseph A.; Woodbury, Dustin A.; Beasom, James D., Integrated circuit having a device wafer with a diffused doped backside layer.
  24. Czagas, Joseph A.; Woodbury, Dustin A.; Beasom, James D., Integrated circuit having a device wafer with a diffused doped backside layer.
  25. Czagas,Joseph A.; Woodbury,Dustin A.; Beasom,James D., Integrated circuit having a device wafer with a diffused doped backside layer.
  26. Henley, Francois J., Layer transfer of films utilizing controlled propagation.
  27. Henley, Francois J., Layer transfer of films utilizing controlled shear region.
  28. Yanagita, Kazutaka; Ohmi, Kazuaki; Sakaguchi, Kiyofumi; Kurisu, Hirokazu, Method and apparatus for processing composite member.
  29. Yanagita, Kazutaka; Ohmi, Kazuaki; Sakaguchi, Kiyofumi; Kurisu, Hirokazu, Method and apparatus for processing composite member.
  30. Francois J. Henley ; Nathan W. Cheung, Method and device for controlled cleaving process.
  31. Henley, Francois J.; Cheung, Nathan W., Method and device for controlled cleaving process.
  32. Henley,Francois J.; Cheung,Nathan, Method and device for controlled cleaving process.
  33. Henley, Francois J., Method and structure for fabricating solar cells using a thick layer transfer process.
  34. Joseph A. Czagas ; Dustin A. Woodbury ; James D. Beasom, Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide.
  35. Ghyselen,Bruno; Letertre,Fabrice; Mazure,Carlos, Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material.
  36. Nishio, Johji; Ishikawa, Masayuki, Method for preparing epitaxial-substrate and method for manufacturing semiconductor device employing the same.
  37. Czagas, Joseph A.; Woodbury, Dustin A.; Beasom, James D., Method of forming an integrated circuit having a device wafer with a diffused doped backside layer.
  38. Nagase, Shinichi; Ogasawara, Atsushi; Ito, Koji, Method of manufacturing semiconductor device and glass film forming apparatus.
  39. Ghyselen, Bruno; Letertre, Fabrice, Methods for fabricating final substrates.
  40. Ghyselen,Bruno; Letertre,Fabrice, Methods for fabricating final substrates.
  41. Malik, Igor J.; Kang, Sien G.; Fuerfanger, Martin; Kirk, Harry; Flat, Ariel; Current, Michael Ira; Ong, Philip James, Non-contact etch annealing of strained layers.
  42. Bryan, Michael A.; Kai, James K., Nozzle for cleaving substrates.
  43. Bryan, Michael A., Particle distribution method and resulting structure for a layer transfer process.
  44. Imada,Aya; Den,Tohru; Saito,Tatsuya, Process for producing structure, process for producing magnetic recording medium, and process for producing molded product.
  45. Henley, Francois J.; Brailove, Adam, Race track configuration and method for wafering silicon solar substrates.
  46. Ghyselen, Bruno; Letertre, Fabrice, Semiconductor substrates having useful and transfer layers.
  47. Ghyselen, Bruno; Letertre, Fabrice, Semiconductor substrates having useful and transfer layers.
  48. Ghyselen, Bruno; Letertre, Fabrice, Semiconductor substrates having useful and transfer layers.
  49. Ghyselen,Bruno; Letertre,Fabrice, Semiconductor substrates having useful and transfer layers.
  50. Ghyselen,Bruno; Letertre,Fabrice, Semiconductor substrates having useful and transfer layers.
  51. Iwane, Masaaki; Nakagawa, Katsumi; Iwakami, Makoto; Nishida, Shoji; Ukiyo, Noritaka; Iwasaki, Yukiko; Mizutani, Masaki, Separation method of semiconductor layer and production method of solar cell.
  52. Henley, Francois J.; Cheung, Nathan W., Silicon-on-silicon hybrid wafer assembly.
  53. Malik, Igor J.; Kang, Sien G., Smoothing method for cleaved films made using a release layer.
  54. Sien G. Kang ; Igor J. Malik, Smoothing method for cleaved films made using a release layer.
  55. Igor J. Malik ; Sien G. Kang, Smoothing method for cleaved films made using thermal treatment.
  56. Meyer, Neal W.; Van Brocklin, Andrew L.; Fricke, Peter; Jackson, Warren; Eldredge, Kenneth James, Storage structure with cleaved layer.
  57. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  58. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  59. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
  60. Kiyofumi Sakaguchi JP; Satoshi Matsumura JP; Kenji Yamagata JP, Substrate processing method and manufacturing method, and anodizing apparatus.
  61. Kang,Sien G.; Malik,Igor J., Surface finishing of SOI substrates using an EPI process.
  62. Brailove, Adam; Liu, Zuqin; Henley, Francois J.; Lamm, Albert J., Techniques for forming thin films by implantation with reduced channeling.
  63. Kang, Sien G.; Malik, Igor J., Treatment method of film quality for the manufacture of substrates.
  64. Fonash,Stephen J.; Li,Handong; Lee,Youngchul; Cuiffi,Joseph D.; Hayes,Daniel J., Use of sacrificial layers in the manufacture of high performance systems on tailored substrates.
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