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A system and method for configuration of a programmable logic device using routing cores. A program executing on a processor includes instructions that select functions to be provided by the programmable logic device. The instructions invoke functions from a library of logic and router core generato

A system and method for configuration of a programmable logic device using routing cores. A program executing on a processor includes instructions that select functions to be provided by the programmable logic device. The instructions invoke functions from a library of logic and router core generators to define logic cores and router cores to intercouple the logic cores. From the logic and router core definitions, the program utilizes a bit-stream library to generate programming bits. The programmable logic device is then loaded with the programming bits by the program.

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[ What is claimed is:] [10.]10. A system for run-time reconfiguration of a programmable logic device, comprising:a library of logic core generators and router core generators accessible for initiation by the application program and executable on the processor, each of the logic and router core gener

[ What is claimed is:] [10.]10. A system for run-time reconfiguration of a programmable logic device, comprising:a library of logic core generators and router core generators accessible for initiation by the application program and executable on the processor, each of the logic and router core generators including code that is executable and that embodies design information;a processor hosting a run-time reconfiguration program, the program including instructions that reference selected ones of the logic and router core generators;a programming bit generator accessible for initiation by the run-time reconfiguration program and arranged for generation of programming bits in response to output of the logic core and router core generators;a programmable logic device coupled to the processor and configurable with the programming bits.