초록 ▼

A method for forming high frequency connections between a fragile chip and a substrate is described, wherein metal is selectively deposited on a surface of a chip and a surface of a substrate, and corresponding patterns of electrically conductive bumps are selectively evaporated on the surface of th

A method for forming high frequency connections between a fragile chip and a substrate is described, wherein metal is selectively deposited on a surface of a chip and a surface of a substrate, and corresponding patterns of electrically conductive bumps are selectively evaporated on the surface of the chip and the surface of the substrate over the metal layers, to form a pattern of electrically conductive bumps having spongy and dendritic properties, placing the chip in aligned contact with the substrate where each electrically conductive chip bump mates with each corresponding electrically conductive substrate bump, and selectively applying heat and pressure to the chip and substrate causing each chip bump to fuse together with each corresponding substrate bump to form an electromechanical bond.

대표청구항 ▼

[ What is claimed is:] [1.]1. A method for forming connections between a chip and a substrate comprising:selectively depositing a first metal layer on a surface of said chip;selectively depositing a second metal layer on a surface of said substrate;selectively forming a pattern of electrically condu

[ What is claimed is:] [1.]1. A method for forming connections between a chip and a substrate comprising:selectively depositing a first metal layer on a surface of said chip;selectively depositing a second metal layer on a surface of said substrate;selectively forming a pattern of electrically conductive bumps on said chip surface over said first metal layer such that each of said electrically conductive bumps forms a spongy and dendritic structure;selectively forming a pattern of electrically conductive bumps on said substrate surface over said second metal layer such that each of said electrically conductive bumps forms a spongy and dendritic structure, and, wherein said substrate electrically conductive bump pattern correspondingly matches said chip electrically conductive bump pattern;selectively placing said chip in aligned contact with said substrate, wherein each said chip electrically conductive bump mates with each said corresponding substrate electrically conductive bump; andselectively applying heat and pressure to said chip and said substrate, thereby causing each said chip electrically conductive bump and each said corresponding substrate electrically conductive bump to fuse and form an electromechanical bond.