초록 ▼

In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treat

In order to obtain a thin-film transistor having high characteristics using a metal element for accelerating the crystallization of silicon, a nickel element is selectively added to the surface of an amorphous silicon film (103) in regions (101) and (102) and regions (108) to (110), and a heat treatment is carried out to grow crystals (horizontal growth) in directions parallel to the substrate as indicated by arrows (104) to (107). At this point, the regions (108) to (110) having a width of 5 .mu.m or less serve as stopper regions so that horizontal growth starting from the regions (101) and (102) stops there. In this way, the horizontal growth regions can be formed with high controllability. Then a circuit such as a shift register can be constructed with a region having the same crystal growth form.

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device including at least one NAND circuit, said NAND circuit comprising:a first semiconductor region of an N-channel thin film transistor formed on an insulating surface;a pair of second and third semiconductor regions of a pair of P-channel thin film t

[ What is claimed is:] [1.]1. A semiconductor device including at least one NAND circuit, said NAND circuit comprising:a first semiconductor region of an N-channel thin film transistor formed on an insulating surface;a pair of second and third semiconductor regions of a pair of P-channel thin film transistors formed on the insulating surface;first and second wirings extending across said first semiconductor region wherein the first wiring extends across the second semiconductor region and the second wiring extends across the third semiconductor region,wherein said first, second and third semiconductor regions are arranged on a same line, and a carrier flow direction of said first, second and third semiconductor regions is along said same line.