초록 ▼

A method and system for programming the hardware of field programmable gate arrays and related reconfigurable resources as if they were software by creating hardware objects that implement application level functionalities, operating system functionalities, and hardware functionalities. Further cont

A method and system for programming the hardware of field programmable gate arrays and related reconfigurable resources as if they were software by creating hardware objects that implement application level functionalities, operating system functionalities, and hardware functionalities. Further controlling and executing the hardware objects via high level software constructs and managing the reconfigurable resources, such that the reconfigurable resources are optimized for the tasks currently executing.

대표청구항 ▼

[ We claim:] [1.]1. A method of programming a field programmable gate array (FPGA), comprising the steps of:providing a development environment which includes a hardware object generator, a text editor, a compiler, and a plurality of libraries;defining a plurality of functional hardware units, each

[ We claim:] [1.]1. A method of programming a field programmable gate array (FPGA), comprising the steps of:providing a development environment which includes a hardware object generator, a text editor, a compiler, and a plurality of libraries;defining a plurality of functional hardware units, each functional hardware unit defining a function that cannot be decomposed and including one or more logic elements;storing said plurality of functional hardware units in a first one of said plurality of libraries;generating a plurality of hardware objects with said hardware object generator, each said hardware object including one or more functional hardware units;storing said plurality of hardware objects in said first library;selecting one or more hardware objects with said text editor to define a unique function;storing a plurality of said selected hardware objects or a plurality of references to said plurality of said selected hardware objects in a second one of said plurality of libraries, thereby creating a plurality of unique functions;selecting one or more of said unique functions with said compiler to create a unique wrapper object module;storing said wrapper object module in a third one of said plurality of libraries;providing a runtime environment which includes a computing system and an interface between said computing system and the FPGA;creating application software operable on said computing system wherein said application software comprises a selected set of hardware objects and said wrapper object modules; andcreating a plurality of hardware object instances, each of which is derived from a hardware object and is located at a physical location on the FPGA and each said hardware object instance being controlled by a respective wrapper object module.