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High density printed circuit substrate and method of fabrication 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B32B-003/00
출원번호 US-0123952 (1998-07-28)
발명자 / 주소
  • Pommer Richard J.
  • Gotro Jeffrey T.
  • Androff Nancy M. W.
  • Hein Marc D.
  • Zarecki Corey J.
출원인 / 주소
  • Isola Laminate Systems Corp.
대리인 / 주소
    McDonnell Boehnen Hulbert & Berghoff
인용정보 피인용 횟수 : 25  인용 특허 : 18

초록

The present invention is a method and apparatus for providing an electrical substrate. The electrical substrate comprises a dielectric layer having a surface roughness of no greater than 6.0 microns. A first conductive layer is attached to the dielectric layer. In one embodiment, the dielectric laye

대표청구항

[ What is claimed is:] [1.]1. An electrical substrate comprising:a dielectric layer having a surface roughness of no greater than 6.0 microns; anda first conductive layer attached to said dielectric layer wherein the conductive layer is applied to at least a portion of the dielectric layer surface t

이 특허에 인용된 특허 (18)

  1. Young Steven J. (Milpitas CA), Battery cell having an internal circuit for controlling its operation.
  2. Kozuka Shoji (Kawasaki JPX) Hayashi Masaru (Yokohama JPX) Oh-Ishi Katsuyoshi (Kawasaki JPX) Yasumoto Takaaki (Kawasaki JPX) Iwase Nobuo (Kamakura JPX) Endo Hiroshi (Yokohama JPX) Yamakawa Koji (Kawas, Ceramic circuit board having a thermal conductivity substrate.
  3. Sallo Jerome S. (Northridge CA), Copper-chromium-polyimide composite.
  4. Tagusari Hideyasu,JPX ; Hirasawa Yutaka,JPX ; Oshima Kazuhide,JPX, Electrodeposited copper foil for printed wiring board and method for manufacturing the same.
  5. Katagiri Mikio (Tokyo JPX) Kato Tatsuo (Yamaguchi JPX), Matt film with a rough surface.
  6. Ishii Kenji (Tokyo JPX) Nakai Takamasa (Tokyo JPX) Matsumoto Hiroyuki (Tokyo JPX), Metal foil-clad laminate having surface smoothness.
  7. Blackwell Kim J. (Owego NY) Chen Pei C. (Endicott NY) Deliman Stephen E. (Endicott NY) Knoll Allan R. (Endicott NY) Matarese George J. (Bradenton FL) Weale Richard D. (Owego NY), Method for metallizing through holes in thin film substrates, and resulting devices.
  8. Blackwell Kim J. (Owego NY) Chen Pei C. (Endicott NY) Deliman Stephen E. (Endicott NY) Knoll Allan R. (Endicott NY) Matarese George J. (Bradenton FL) Weale Richard D. (Owego NY), Method for metallizing through holes in thin film substrates, and resulting devices.
  9. Clarke Thomas C. (Morgan Hill CA) Kovac Caroline A. (Ridgefield CT) Jung Dae Y. (Endwell NY) Park Jae M. (Mahopac NY) Thomas Richard R. (Fishkill NY), Method for preparing substrates for deposition of metal seed from an organometallic vapor for subsequent electroless met.
  10. Brown Lawrence E. (Loveland CO) Bauer James L. (Loveland CO) Scheck Gerald W. (Loveland CO), Method for producing a metallic pattern upon a substrate.
  11. Sakai Hiroshi,JPX ; Nakamura Yoshihiro,JPX ; Murai Hikari,JPX ; Iijima Toshiyuki,JPX, Method of producing metal clad laminate.
  12. Topp Rainer (Reutlingen DEX) Uebele Manfred (Reutlingen DEX), Monolithically integrated MOS output-stage component with overload-protection means.
  13. Bahrle Dieter (Schnaich DEX) Schwerdt Friedrich (Herrenberg DEX) Stehling Jurgen H. (Herrenberg DEX), Process for producing printed circuits.
  14. Arrington Edward Lee ; Camp John Christopher ; Day Robert Jeffrey ; Fey Edmond Otto ; Gunther Curtis Michael ; Miller Thomas Richard, Process for removal of undersirable conductive material on a circuitized substrate and resultant circuitized substrate.
  15. Kumagai Koichi (Ikoma JPX), Resin circuit substrate and manufacturing method therefor.
  16. Kasai Shin (Fukushima JPX) Waketa Hideharu (Fukushima JPX) Kato Keiichi (Fukushima JPX) Kawaguchi Yutaka (Fukushima JPX), Substrate for printed circuit.
  17. Shigemoto Hiromi (Iwakuni JPX) Abe Shunji (Tokyo JPX) Yamamoto Akio (Iwakuni JPX), Surface-roughened film and sheet, and process for production and use thereof.
  18. Kasai Shin (Fukushima JPX) Waketa Hideharu (Fukushima JPX) Kato Keiichi (Fukushima JPX) Kawaguchi Yutaka (Fukushima JPX), Woven material of inorganic fiber and process for making the same.

이 특허를 인용한 특허 (25)

  1. McDermott, Brian J.; McGowan, Daniel; Spotts, Jr., Ralph Leo; Tryzbiak, Sid, Circuit board or other multilayer electrical device made by forming teeth to join layers.
  2. Pachla, Timothy; Harris, Edwin James; Vyas, Tushar, Direct application voltage variable material.
  3. Harris,Edwin James; Vyas,Tushar; Whitney,Stephen J., Direct application voltage variable material, components thereof and devices employing same.
  4. Harris,Edwin James; Vyas,Tushar; Pachla,Timothy; Colby,James A., Direct application voltage variable material, devices employing same and methods of manufacturing such devices.
  5. Kojima,Toshifumi; Wakazono,Makoto; Takada,Toshikatu, Filling material, multilayer wiring board, and process of producing multilayer wiring board.
  6. Kataoka,Tatsuo; Akashi,Yoshikazu, Film carrier tape for mounting electronic devices thereon.
  7. Chiu, Chien-Hwa; Chao, Chih-Min; Kuo, Peir-Rong; Chiang, Chia-Hua; Hsiao, Chih-Cheng; Kuan, Feng-Ping; Lee, Ying-Wei; Juang, Yung-Chang, Flexible circuit board and process for producing the same.
  8. Harris, Edwin James; Pachla, Timothy; Vyas, Tushar, Flexible circuit having overvoltage protection.
  9. Moriizumi, Kiyokazu, Front-and-back electrically conductive substrate.
  10. Harkness, Jr., Arthur E.; Kenny-McDermott, Eva M.; Farineau, Paul W.; Lavallee, Raymond A.; Fancher, Michael, High-speed interconnects for printed circuit boards.
  11. Kim, Nam-Jin; Ahn, Young-Cheol; Kim, Won-Jae, Method for fabricating printed circuit board.
  12. Moriizumi,Kiyokazu, Method for making a front and back conductive substrate.
  13. Wunderlich, Christian; Backus, Petra; Mahlkow, Hartmut, Method for producing solderable and functional surfaces on circuit carriers.
  14. Rendek, Jr., Louis Joseph; Weatherspoon, Michael Raymond; Rodriguez, Casey Philip; Nicol, David, Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices.
  15. Rendek, Jr., Louis Joseph; Weatherspoon, Michael; Rodriguez, Casey Philip; Nicol, David, Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices.
  16. Sidhu, Rajwant; Walker, Paul, Method of manufacturing a printed circuit board.
  17. Leif Bergstedt SE; Per Ligander SE, PCB and method for making PCB with thin copper layer.
  18. Japp, Robert M.; Poliks, Mark D., Porous power and ground planes for reduced PCB delamination and better reliability.
  19. Koizumi,Nobukazu, Printed wiring board manufacturing method.
  20. Day, Richard Allen; Knadle, Kevin Taylor; Stauffer, Kristen Ann, Selectively roughening conductors for high frequency printed wiring boards.
  21. Day,Richard Allen; Knadle,Kevin Taylor; Stauffer,Kristen Ann, Selectively roughening conductors for high frequency printed wiring boards.
  22. Burrell, Lloyd G.; Wong, Kwong H.; Kelly, Adreanne A.; McKnight, Samuel R., Semiconductor device having a composite layer in addition to a barrier layer between copper wiring and aluminum bond pad.
  23. Harris,Edwin James; Davidson,Scott; Perry,David; Whitney,Steven J., Voltage variable material for direct application and devices employing same.
  24. Harris, IV,Edwin James, Voltage variable substrate material.
  25. Kaneda,Yutaka, Wiring circuit board having bumps and method of producing same.
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