초록 ▼

By time-sharing demodulator hardware between a primary data path (165), a power control data path (161), and a received signal strength indicator (RSSI) path (163), an entire power control data path (161) can be implemented in a demodulator (140) of a spread spectrum subscriber unit receiver with a

By time-sharing demodulator hardware between a primary data path (165), a power control data path (161), and a received signal strength indicator (RSSI) path (163), an entire power control data path (161) can be implemented in a demodulator (140) of a spread spectrum subscriber unit receiver with a low increase in gate count. The primary data path (165) and the power control data path (161) time-share a complex conjugate generator (270), a complex multiplier (280), and a real component extractor (290). Due to timing requirements, though, the channel estimation filter (240) of the primary data path cannot be time-shared with the power control data path. Instead, dynamic coefficient scaling is added to an infinite-duration impulse response (IIR) filter in the RSSI path (163) so that the IIR filter (250) with dynamic coefficient scaling can be time-shared between the RSSI path (163) and the power control data path (161).

대표청구항 ▼

[ We claim:] [1.]1. A demodulator for producing a received signal strength indicator (RSSI) value signal and a power control data signal comprising:an infinite-duration impulse response (IIR) filter with dynamic coefficient scaling having:an adder having an adder output;a coefficient selection block

[ We claim:] [1.]1. A demodulator for producing a received signal strength indicator (RSSI) value signal and a power control data signal comprising:an infinite-duration impulse response (IIR) filter with dynamic coefficient scaling having:an adder having an adder output;a coefficient selection block, coupled to the adder output, for selectively multiplying a signal at the adder output by either a first coefficient set or a second coefficient set; anda delay block, coupled to the coefficient selection block, for providing a negative feedback signal from the coefficient selection block to the adder.