초록 ▼

A flip-chip semiconductor die assembly is provided with discrete projecting connective elements on the die and mating recessed contacts on the substrate, together forming a plurality of electrical, mechanical, and thermal connections between the die and substrate. The element and recess provide a se

A flip-chip semiconductor die assembly is provided with discrete projecting connective elements on the die and mating recessed contacts on the substrate, together forming a plurality of electrical, mechanical, and thermal connections between the die and substrate. The element and recess provide a self-aligning feature. Compared to the prior art, a less costly, simpler method for forming the element and recess is provided, which method requires fewer process steps, uses less raw materials, and generates less waste. The method allows for placement of fine-pitch connective elements and precise control of element size and height.

대표청구항 ▼

[ What is claimed is:] [1.]1. A method for forming at least one discrete connective element for flip-chip connection of a semiconductor die, comprising:providing at least one semiconductor die having a surface with at least one bond pad placed thereon;forming at least one passivation layer to a pred

[ What is claimed is:] [1.]1. A method for forming at least one discrete connective element for flip-chip connection of a semiconductor die, comprising:providing at least one semiconductor die having a surface with at least one bond pad placed thereon;forming at least one passivation layer to a predetermined thickness over the at least one bond pad and the die surface surrounding the at least one bond pad;selectively removing a portion of the at least one passivation layer to form at least one aperture therethrough exposing at least part of the at least one bond pad;depositing a layer of conductive material over the at least one passivation layer and into the at least one aperture formed therethrough to substantially fill the at least one aperture and contact the at least one bond pad;removing the conductive material layer above the at least one passivation layer by a first process to expose an uppermost surface of the at least one passivation layer to provide an upper surface of conductive material within the at least one aperture generally flush with the exposed uppermost surface of the at least one passivation layer and to retain the predetermined thickness of the at least one passivation layer over the die surface; andreducing the predetermined thickness of the at least one passivation layer by a second differing process to define at least one discrete connective element from deposited conductive material projecting above the at least one passivation layer.