초록 ▼

There is described a method of manufacturing a semiconductor device for the purpose of preventing damage to a lower wiring layer, wherein wiring elements of dual damascene structure are formed on the lower wiring layer. Under the method, a first silicon nitride film, a first silicon oxide film, a se

There is described a method of manufacturing a semiconductor device for the purpose of preventing damage to a lower wiring layer, wherein wiring elements of dual damascene structure are formed on the lower wiring layer. Under the method, a first silicon nitride film, a first silicon oxide film, a second silicon nitride film, and a second silicon oxide film are formed, in this sequence, on a lower wiring layer. A via hole is formed at a position above the lower wiring layer so as to pass through the second silicon oxide film and the second silicon nitride film. A photoresist is embedded into the via hole so as to cover the internal wall surface thereof. After formation of a protective film from the photoresist, predetermined portions of the second silicon oxide film and the second silicon nitride film are removed, thus forming a wiring trench.

대표청구항 ▼

[ What is claimed is:] [1.]1. A method of manufacturing a semiconductor device having a wiring element of dual damascene structure, the method comprising the sequential steps of:forming on a lower wiring layer a film for preventing diffusion of metal;forming a first dielectric film on the metal diff

[ What is claimed is:] [1.]1. A method of manufacturing a semiconductor device having a wiring element of dual damascene structure, the method comprising the sequential steps of:forming on a lower wiring layer a film for preventing diffusion of metal;forming a first dielectric film on the metal diffusion prevention film;forming an etch stopper film on the first dielectric film;forming a second dielectric film on the etch stopper film;forming a via hole at a position above the lower wiring layer by etching through the second dielectric film, the etch stopper film, and the first dielectric film;forming an organic layer within the via hole so as to cover the internal wall surface of the via hole; andforming a wiring trench after formation of the organic layer by etching a predetermined portion of the second dielectric film;wherein the organic layer is formed so as to cover at least an area of the via hole from the bottom of the via hole to the internal surface of the second dielectric film.