초록 ▼

The present invention relates to the formation of a semiconductor device having selectively fabricated copper interconnect structure that is encapsulated within selectively formed metallic barriers. An exemplary encapsulated copper interconnect structure includes a first low dielectric constant laye

The present invention relates to the formation of a semiconductor device having selectively fabricated copper interconnect structure that is encapsulated within selectively formed metallic barriers. An exemplary encapsulated copper interconnect structure includes a first low dielectric constant layer (low K1) formed over a substantially completed semiconductor device on which a first sidewall metallic barrier, consisting of metallic material, such as tantalum (Ta), tantalum nitride (TaN) and tungsten nitride WN, is formed to line the wall structure of a via. The metallic liner encapsulates a first, substantially thin (.ltoreq.0.25 .mu.m) copper interconnect structure. A second selectively formed thicker (>>0.25 .mu.m) copper interconnect trench structure is formed overlying and integral with the first copper interconnect structure. A second metallic barrier, consisting of CoWP (cobalt-tungsten-phosphide) is deposited over the second selectively formed copper interconnect structure and is formed integral with the first sidewall metallic barrier. The fully encapsulated copper interconnect structure can be further processed to spin coat a second low dielectric constant material layer (low K2) formed about it using the same dielectric material that was used for the low K1 layer. The low K2 layer may be further lithographically processed to form a via structure to provide further electrical interconnect means. The process of the present invention facilitates the use of low dielectric material which results in a semiconductor structure that is free of Si.sub.3 N.sub.4 or SiO.sub.2, in the copper interconnect region and which comprises copper interconnect structure that overcomes undesirable copper diffusion characteristic.

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device having an encapsulated copper interconnect structure, said semiconductor device comprising:(a) a semiconductor substrate that requires electrical interconnect structure;(b) a first copper interconnect structure comprising an elevated copper interc

[ What is claimed is:] [1.]1. A semiconductor device having an encapsulated copper interconnect structure, said semiconductor device comprising:(a) a semiconductor substrate that requires electrical interconnect structure;(b) a first copper interconnect structure comprising an elevated copper interconnect structure portion over a first metallic barrier, said first copper interconnect structure being formed within a via structure lined with a metallic barrier material,said via structure being formed within a first insulating layer fabricated over said semiconductor substrates,said via structure having a cross-sectional area of high aspect ratio in a range of at least 3:1;(c) a second copper interconnect structure disposed directly on said elevated copper interconnect structure portion of said first copper interconnect structure;said elevated copper interconnect structure portion being supported by exposed portions of said first metallic barrier,said elevated copper interconnect structure portion and said portion of said first copper interconnect structure formed within said via structure, comprising a composite copper interconnect structure; and(d) a second metallic barrier over said elevated copper interconnect structure portion, said second metallic barrier being formed such that said exposed portions of said first metallic barrier bond with corresponding portions of said second metallic barrier to form an encasement that encapsulates said composite copper interconnect structure; and(e) second insulating layer over said first insulating layer and about said encased composite copper interconnect structure.