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특허 상세정보

MyON담기
내보내기 페이스북 공유 카카오톡 공유

Ball grid array electronic package

특허상세정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판) H01L-023/04   
미국특허분류(USC) 257/698 ; 257/786 ; 257/773
출원번호 US-0033596 (1993-03-19)
발명자 / 주소
출원인 / 주소
대리인 / 주소
    Rosenblatt
인용정보 피인용 횟수 : 49  인용 특허 : 40
초록

There is provided a ball grid array package for housing semiconductor devices. The package has a metallic base with conductive vias extending through holes formed in the base. The conductive vias terminate adjacent an exterior surface of the base. A dielectric coating on at least part of the base and through hole walls electrically isolates the metallic base from the package circuitry.

대표
청구항
▼

[ What is claimed is:] [1.]1. An electronic package, comprising:a base formed from a metal selected from the group consisting of copper, aluminum and alloys thereof and having interior and exterior surfaces;a plurality of electrically conductive vias extending through said metallic base and terminating approximately at said exterior surface, said electrically conductive vias adapted to receive a first electrically conductive means selected from the group consisting of solders, conductive polymers and conductive sealing glasses adjacent said exterior surf...

이 특허에 인용된 특허 (40)

  1. Mahulikar Deepak (Meriden CT) Popplewell James M. (Guilford CT). Aluminum alloy semiconductor packages. USP1990074939316.
  2. Kaufman Lance R. (7345 East Acoma Scottsdale AZ 85260). Circuit assembly and method with direct bonded terminal pin. USP1991024990720.
  3. Engel Peter A. (Binghamton NY) Strope Douglas H. (Apalachin NY) Wray Thomas E. (Vestal NY). Displacement compensating module. USP1985044514752.
  4. Alexander Lawrence C. (Whitney Point NY) Appelt Bernd K. (Apalachin NY) Balkin David K. (Mishawaka IN) Hansen James J. (Endicott NY) Hromek Joseph (Endwell NY) Kaschak Ronald A. (Vestal NY) Lauffer J. Electrical and/or thermal interconnections and methods for obtaining such. USP1993025189261.
  5. Yazu Hajime (Gifu JPX) Iriyama Takao (Gifu JPX). Electronic part mounting board and method of manufacturing the same. USP1992065124884.
  6. Carey David H. (Austin TX). Flip substrate for chip mount. USP1990054926241.
  7. Foster Craig A. (Alameda CA) Galvez Randolfo (North Bergen NJ) Raab Kurt R. (Sunnvale CA). G-TAB having particular through hole. USP1991115065228.
  8. Sugimoto Masahiro (Yokosuka JPX) Wakasugi Yasumasa (Kawasaki JPX) Harada Shigeki (Kawasaki JPX). Heatsink package for flip-chip IC. USP1987104698663.
  9. Pryor Michael J. (Woodbridge CT) Singhdeo Narendra N. (New Haven CT) Mahulikar Deepak (Meriden CT). Hermetically sealed package. USP1989044821151.
  10. Hiroi Atsushi (Oogaki JPX) Kondo Mitsuhiro (Oogaki JPX) Ohshima Kinya (Oogaki JPX). High lead count circuit board for connecting electronic components to an external circuit. USP1992095151771.
  11. Murano Hiroshi (Tokyo JPX) Akino Moritoshi (Tokyo JPX). Integrated circuit chip package for logic circuits. USP1983084398208.
  12. Mullen ; III William B. (Boca Raton FL) Urbish Glenn F. (Coral Springs FL) Freyman Bruce J. (Plantation FL). Leadless pad array chip carrier. USP1993085241133.
  13. Endoh Satoru (Kanagawa JPX) Katsuga Ohnishi (Kanagawa JPX). Metallic core wiring substrate. USP1989074845313.
  14. Catheline Marc (Chatillon Sous Bagneux FRX) Dody Jean-Nol (Plaisir FRX) Maquaire Jean-Pierre (Louveciennes FRX). Method for brazing an element transversely to a wall, a brazed-joint assembly for carrying out said method, and a packag. USP1993125267684.
  15. Pryor Michael J. (Woodbridge CT) Watson William G. (Cheshire CT). Method of joining metallic components. USP1988094771537.
  16. Ishida Yoshihiro (Tokorozawa JPX) Komatsu Katsuji (Kawagoe JPX) Mimura Seiichi (Kawagoe JPX) Takenouchi Kikuo (Higashimurayama JPX) Yabe Isao (Tokorozawa JPX) Ichikawa Shingo (Sayama JPX) Shimada Yos. Method of making a resin encapsulated pin grid array with integral heatsink. USP1992045108955.
  17. Freyman Bruce J. (N. Lauderdale FL) Dorinski Dale (Coral Springs FL) Shurboff John (Coral Springs FL). Method of making an ultra high density pad array chip carrier. USP1987104700473.
  18. O\Leary Daniel J. (Natick MA). Method of soldering leadless component carriers or the like. USP1988094771159.
  19. Hernandez Jorge M. (Mesa AZ) Simpson Scott (Woodstock CT). Molded integrated circuit package incorporating heat sink. USP1991115065281.
  20. McShane Michael B. (Austin TX) Lin Paul T. (Austin TX) Wilson Howard P. (Austin TX). Packaged semiconductor device having a low cost ceramic PGA package. USP1991045006922.
  21. Hirata Atsuomi (Nara JPX) Nakamura Yoshihiko (Nishinomiya JPX) Morii Kensaku (Takatsuki JPX). Plastic molded pin grid chip carrier package. USP1989094868638.
  22. Casto James J. (Austin TX) McShane Michael B. (Austin TX) Lin Paul T. (Austin TX). Plastic pad array electronic AC device. USP1991095045914.
  23. Cohn Charles (Wayne NJ). Plastic pin grid array package. USP1992045102829.
  24. Mabuchi Katsumi (Motosu JPX) Komura Toshimi (Ogaki JPX). Printed wiring board for mounting electronic parts and process for producing the same. USP1988044737395.
  25. Lin Paul T. (Austin TX). Process for making a hermetic low cost pin grid array package. USP1988124791075.
  26. Mahulikar Deepak (Meriden CT). Process for manufacturing a metal pin grid array package. USP1992035098864.
  27. Bridges William G. (Meriden CT) Armer Thomas A. (New Haven CT) Chang Kin-Shiung (Meriden CT). Process for manufacturing plastic pin grid arrays and the product produced thereby. USP1989034816426.
  28. Chang Kin-Shiung (Meriden CT) Armer Thomas A. (New Haven CT) Bridges William G. (San Jose CA). Process for manufacturing plastic pin grid arrays and the product produced thereby. USP1990104965227.
  29. Chang Kin-Shiung (Meriden CT) Armer Thomas A. (New Haven CT) Bridges William G. (San Jose CA). Process for manufacturing plastic pin grid arrays and the product produced thereby. USP1992095144412.
  30. Butt Sheldon H. (Godfrey IL). Semiconductor casing. USP1984074461924.
  31. Khandros Igor Y. (Peekskill NY) DiStefano Thomas H. (Bronxville NY). Semiconductor chip assemblies having interposer and flexible lead. USP1992095148266.
  32. Khandros Igor Y. (Peekskill NY) DiStefano Thomas H. (Bronxville NY). Semiconductor chip assemblies with fan-in leads. USP1992095148265.
  33. Lee James C. K. (Los Altos CA) Amdahl Gene M. (Atherton CA) Beck Richard L. (Cupertino CA) Quinn Robert F. (Cupertino CA) Sochor Jerzy R. (San Jose CA). Semiconductor chip interface. USP1987054667219.
  34. Lin Paul T. (Austin TX) McShane Michael B. (Austin TX) Wilson Howard P. (Austin TX). Semiconductor device having a pad array carrier package. USP1993065216278.
  35. Mugiya Hiroshi (Tama JPX) Hasegawa Mitsuo (Kawasaki JPX) Arai Youichi (Machida JPX). Semiconductor device having waveguide-coaxial line transformation structure. USP1989094868639.
  36. Guzuk Andrzej T. (Pompano Beach FL) Roshitsh Todd W. (No. Lauderdale FL) Engstrom Scott M. (Coral Springs FL) Bernardoni Lonnie L. (Coral Springs FL). Shielded low-profile electronic component assembly. USP1992105153379.
  37. Jung James E. (Westfield IN) Koors Mark A. (Kokomo IN) Lutz Phillip A. (Kokomo IN). Surface mount package for encapsulated tape automated bonding integrated circuit modules. USP1987114706811.
  38. Ruggiero Murray A. (East Haven CT) Chang Kin S. (Meriden CT) Anderson George A. (Old Lyme CT) Brooker Robert T. (Watertown CT). Terminal pins for flexible circuits. USP1991095046971.
  39. Soldner Keith D. (Coral Springs FL) Juskey Frank J. (Coral Springs FL) Freyman Bruce J. (Plantation FL) Miles Barry M. (Plantation FL). Transfer molded semiconductor device package with integral shield. USP1992115166772.
  40. Higuchi Tooru (Kadoma JPX) Yamaguchi Tosiyuki (Kadoma JPX) Kanou Takeshi (Kadoma JPX). Wiring board. USP1989054835598.

이 특허를 인용한 특허 피인용횟수: 49

  1. Minervini, Anthony D.. Bottom port multi-part surface mount MEMS microphone. USP2015059024432.
  2. Minervini, Anthony D.. Bottom port surface mount MEMS microphone. USP2015069051171.
  3. Minervini, Anthony D.. Bottom port surface mount MEMS microphone. USP2015099139422.
  4. Schick, David Edward; Kottilingam, Srikanth Chandrudu; McConnaughhay, Johnie Franklin; Tollison, Brian Lee; Cui, Yan. Brazing process and plate assembly. USP2015028960525.
  5. Glenn, Thomas P.; Hollaway, Roy D.; Webster, Steven. Ceramic semiconductor package and method for fabricating the package. USP2003096627987.
  6. Neftin, Shimon; Mirsky, Uri. Device for electronic packaging, pin jig fixture. USP2003126670704.
  7. Hashimoto, Minoru; Kitamura, Yoichi; Kondo, Yosuke; Ichikawa, Kenichiro. Electronic component package. USP2014128912453.
  8. Morita,Koji; Yoshikawa,Takao; Murai,Takayuki. Electronic substrate, power module and motor driver. USP2006107119437.
  9. Szczech, John B.; Van Kessel, Peter. Embedded dielectric as a barrier in an acoustic device and method of manufacture. USP2016069374643.
  10. Moden, Walter L.. Flip chip adaptor package for bare die. USP2003126667556.
  11. Moden, Walter L.. Flip chip adaptor package for bare die. USP2003016512303.
  12. Moden, Walter L.. Flip-chip adaptor package for bare die. USP2005036861290.
  13. Moden,Walter L.. Flip-chip adaptor package for bare die. USP2008027329945.
  14. Moden,Walter L.. Flip-chip adaptor package for bare die. USP2008067381591.
  15. Moden, Walter L.. Grid array packages. USP2011118049317.
  16. Moden, Walter L.. Grid array packages and assemblies including the same. USP2012108299598.
  17. Gibson, Ronald S.; Mitra, Deepanjan; Burayez, Ammar. Headlamp device with housing providing thermal management. USP2013098529081.
  18. Eytcheson, Charles T.; Houk, Larry William; Mummert, Rick B.. Heatsink buffer configuration. USP2005076918437.
  19. Watson, Joshua; Grosse, Daniel Todd; Jacobs, Michael Robert; Schimpf, William F.; Del Valle Figueroa, Ivelisse. Ingress protection for reducing particle infiltration into acoustic chamber of a MEMS microphone package. USP2017109794661.
  20. Kim, Hyun Joung; Lim, Taeg Ki; Yun, Ja Eun. Integrated circuit package system with thermo-mechanical interlocking substrates. USP2010027656017.
  21. Celaya,Phillip C.; Donley,James S.; St. Germain,Stephen C.. Lead-free integrated circuit package structure. USP2007027180170.
  22. Huang,Ching Jung; Chou,Hsiu Chu; Liao,Mu Sheng; Chen,Fu Tsai; Kuo,Pao Chuan. Load board. USP2006087094068.
  23. Gibson, Ronald S.; Mitra, Deepanjan; Burayez, Ammar. Metal core circuit board with conductive pins. USP2013038395058.
  24. Celaya, Phillip C.; Donley, James S.; St. Germain, Stephen C.. Method of making a lead-free integrated circuit package. USP2005056889429.
  25. Leung, Timothy; Ramos, Mary Jean Bajacan; Yeow, Gan Kian; Lwin, Kyaw Ko; San Antonio, Romarico Santos; Subagio, Anang. Method of making thermally enhanced substrate-base package. USP2010067741158.
  26. Lim, Chang Hyun; Kang, Jung Eun; Park, Heung Soo; Choi, Seog Moon; Kim, Kwang Soo; Chae, Joon Seok; Park, Sung Keun. Method of manufacturing a hybrid heat-radiating substrate. USP2015089107313.
  27. Nakamura, Hidehiro; Enomoto, Tetsuya; Yamazaki, Toshio; Kawazoe, Hiroshi. Method of manufacturing wiring substrate. USP2010047704799.
  28. Moden, Walter L.. Methods for providing and using grid array packages. USP2012068198138.
  29. Minervini, Anthony D.. Methods of manufacture of bottom port multi-part surface mount MEMS microphones. USP2015059040360.
  30. Minervini, Anthony D.. Methods of manufacture of bottom port surface mount MEMS microphones. USP2015109150409.
  31. Minervini, Anthony D.. Methods of manufacture of bottom port surface mount MEMS microphones. USP2015099133020.
  32. Minervini, Anthony D.. Methods of manufacture of top port multi-part surface mount MEMS microphones. USP2015089096423.
  33. Minervini, Anthony D.. Methods of manufacture of top port multi-part surface mount silicon condenser microphones. USP2015069061893.
  34. Minervini, Anthony D.. Methods of manufacture of top port surface mount MEMS microphones. USP2015109156684.
  35. Minervini, Anthony D.. Methods of manufacture of top port surface mount MEMS microphones. USP2015069067780.
  36. Loeppert, Peter V.; McCall, Ryan M.; Giesecke, Daniel; Vos, Sandra F.; Szczech, John B.; Lee, Sung Bok; Van Kessel, Peter. Microphone assembly with barrier to prevent contaminant infiltration. USP2015079078063.
  37. Nakajima, Dai; Ishida, Kiyoshi; Shikano, Taketoshi. Resin-sealed semiconductor device. USP2004066753596.
  38. Wataya, Yukinobu. Solid image-pickup device with flexible circuit substrate. USP20180910068938.
  39. Wataya, Yukinobu. Solid image-pickup device with through hole passing through substrate. USP2016099455286.
  40. Corisis, David J.; Brooks, Jerry M.; Moden, Walter L.. Stackable ball grid array package. USP201201RE43112.
  41. Moden, Walter L.. Stackable semiconductor device assemblies. USP2012048164175.
  42. Shimon Neftin IL; Uri Mirsky IL. Substrate for electronic packaging, pin jig fixture. USP2002096448510.
  43. Minervini, Anthony D.. Top port multi-part surface mount MEMS microphone. USP2015059023689.
  44. Minervini, Anthony D.. Top port multi-part surface mount silicon condenser microphone. USP2015049006880.
  45. Minervini, Anthony D.. Top port multi-part surface mount silicon condenser microphone. USP2018059980038.
  46. Minervini, Anthony D.. Top port multi-part surface mount silicon condenser microphone. USP2016059338560.
  47. Minervini, Anthony D.. Top port surface mount MEMS microphone. USP2015099139421.
  48. Minervini, Anthony D.. Top port surface mount MEMS microphone. USP2015099148731.
  49. Nakamura,Hidehiro; Enomoto,Tetsuya; Yamazaki,Toshio; Kawazoe,Hiroshi. Wiring board, semiconductor device, and method of manufacturing wiring board. USP2007047205645.

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