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A flip chip on chip assembly including a first flip chip; a second flip chip directly connected to the top of the first flip chip; and electrically conductive epoxy means disposed between the second flip chip and the top of the first flip chip to form an electrical connection between the first flip

A flip chip on chip assembly including a first flip chip; a second flip chip directly connected to the top of the first flip chip; and electrically conductive epoxy means disposed between the second flip chip and the top of the first flip chip to form an electrical connection between the first flip chip and the second flip chip. In another preferred embodiment, the present invention provides a flip chip assembly including a plurality of semiconductor chips where the plurality of chips are vertically interconnected on top of one another to form an electrically interconnected stack of chips; a flip chip directly connected to the top chip of the stack of chips; and electrically conductive epoxy means disposed between said flip chip and said top chip to form an electrical connection between the flip chip and the top chip. In still another preferred embodiment, the present invention provides a flip chip assembly including a semiconductor wafer having a plurality of first flip-chips formed thereon; a plurality of second flip chips, each one of the second flip chips directly connected to a respective one of the plurality of first flip-chips; and electrically conductive epoxy means disposed between the respective first flip-chip and second flip-chip connections to form an electrical connection between the respective first flip-chip and second flip chip connections. The present invention provides several very desirable features, including the ability to: (1) bond one die to another die in a flip chip fashion; (2) the ability to add a third die on top of the two flip chip die arrangement and wire bond that combination of three dies with two sets of wire bonds; and (3) the ability to further enhance the improved flip chip arrangement by combining a flip chip process (DCP) with a vertical integration process (VIP) to allow for the stacking of a plurality of die (e.g., N die). The flip chip on chip process according to the present invention provides for higher die density in the same board area and a reduction in the number of wires bonds that are required (therefore enhancing the reliability).

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[ What is claimed is:] [1.]1. A flip chip assembly comprising:a first flip chip mounted on a lead frame, the top portion of said first flip chip wire bonded to said lead frame;a second flip chip, the top portion of said second flip chip directly connected to the top portion of said first flip chip;e

[ What is claimed is:] [1.]1. A flip chip assembly comprising:a first flip chip mounted on a lead frame, the top portion of said first flip chip wire bonded to said lead frame;a second flip chip, the top portion of said second flip chip directly connected to the top portion of said first flip chip;electrically conductive epoxy means disposed between said top portion of said second flip chip and said top portion of said first flip chip to form an electrical connection between said first flip chip and said second flip chip; andmeans for maintaining a predetermined distance between said first flip chip and said second flip chip.