초록 ▼

To improve the operation characteristic and reliability of a semiconductor device by optimizing the structure of bottom gate type or inverted stagger type TFTs arranged in circuits of the semiconductor device in accordance with the function of the respective circuits. At least LDD regions that overl

To improve the operation characteristic and reliability of a semiconductor device by optimizing the structure of bottom gate type or inverted stagger type TFTs arranged in circuits of the semiconductor device in accordance with the function of the respective circuits. At least LDD regions that overlap with a gate electrode are formed in an N channel type TFT of a driving circuit, and LDD regions that do not overlap with the gate electrode are formed in an N channel type TFT of a pixel matrix circuit. The concentration of the two kinds of LDD regions is differently set from each other, to thereby obtain the optimal circuit operation.

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device comprising:a pixel portion and a driver circuit for the pixel portion on a same substrate;a first n-channel thin film transistor being formed in the pixel portion and including:a first active layer;at least a first LDD region in the first active l

[ What is claimed is:] [1.]1. A semiconductor device comprising:a pixel portion and a driver circuit for the pixel portion on a same substrate;a first n-channel thin film transistor being formed in the pixel portion and including:a first active layer;at least a first LDD region in the first active layer;a first gate insulating film being formed between the first active layer and the substrate;a first gate electrode being formed between the first gate insulating film and the substrate;a second n-channel thin film transistor being formed in the driver circuit and including:a second active layer;at least a second LDD region in the second active layer;a second gate insulating film being formed between the second active layer and the substrate;a second gate electrode being formed between the second gate insulating film and the substrate,wherein the first LDD region of the first n-channel thin film transistor in the pixel portion is not overlapped with the first gate electrode,wherein the second LDD region of the second n-channel thin film transistor in the driver circuit is overlapped with the second gate electrode,wherein the first LDD region includes an n-type impurity at a first concentration while the second LDD region includes the n-type impurity at a second concentration,wherein the second concentration is higher than the first concentration.