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Storage device array architecture with solid-state redundancy unit 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H02H-003/05
출원번호 US-0579552 (1995-12-27)
발명자 / 주소
  • Gordon David W.
출원인 / 주소
  • EMC Corporation
대리인 / 주소
    Howrey Simon Arnold & White, LLP
인용정보 피인용 횟수 : 37  인용 특허 : 28

초록 ▼

A fault tolerant storage subsystem includes a first tier of failure independent data storage units coupled to a storage controller, and a second tier, including at least one failure independent data storage unit, coupled to at least one of the failure independent data storage units in the first tier

대표청구항 ▼

[ What is claimed is:] [1.]1. A fault tolerant storage subsystem comprising:a first tier of failure independent data storage units coupled to a storage controller; anda second tier of at least one failure independent data storage units coupled to at least one of said failure independent data storage

이 특허에 인용된 특허 (28)

  1. Kakuta Hitoshi (Kokubunji JPX) Kamo Yoshihisa (Musashimurayama JPX) Aoi Hajime (Tachikawa JPX), Array disk subsystem.
    상세보기
  2. Nguyen Anh (Sunnyvale CA) Gajjar Kumar (San Jose CA), Buffering system for dynamically providing data to multiple storage elements.
    상세보기
  3. Hartness Carl B. (Bloomington MN), Data error correction system.
    상세보기
  4. Ratcliffe, Michael J., Data storage apparatus.
    상세보기
  5. Goodlander Theodore J. (Nashau NH) Kacirek Raul (Nashau NH) Sarkozy Andras (Milton MA) Hetenyi Tamas (Concord MA) Selmeczi Janos (Concord MA), Data storage system with asynchronous host operating system communication link.
    상세보기
  6. Dunphy ; Jr. Robert H. (Holland PA) Walsh Robert (Boulder CO) Bowers John H. (Clarksburg NJ), Disk drive memory.
    상세보기
  7. Dunphy ; Jr. Robert H. (Holland PA) Walsh Robert (Boulder CO) Bowers John H. (Clarksburg NJ), Disk drive memory.
    상세보기
  8. Henson Larry P. (Santa Clara CA) Gajjar Kumar (San Jose CA) Powers David T. (Morgan Hill CA) Idleman Thomas E. (Santa Clara CA), Failure-tolerant mass storage system.
    상세보기
  9. Henson Larry P. (Santa Clara CA) Gajjar Kumar (San Jose CA) Powers David T. (Morgan Hill CA) Idleman Thomas E. (Santa Clara CA), Failure-tolerant mass storage system.
    상세보기
  10. Varaiya Rooshabh (Cupertino CA) Ng David S. (Saratoga CA) Pauker Armando (Sunnyvale CA) Ferchau Joerg U. (Morgan Hill CA), Fault tolerant modular subsystems for computers.
    상세보기
  11. Krakauer Arno S. (San Jose CA) Gawlick Dieter (Palo Alto CA) Colgrove John A. (Mountain View CA) Wilmot ; II Richard B. (Lafayette CA), File system for a plurality of storage classes.
    상세보기
  12. Frey ; Jr. Alexander H. (Pasadena CA) Mosteller Richard C. (Sierra Madre CA), File-based redundant parity protection in a parallel computing system.
    상세보기
  13. Flora Laurence P. (Covina CA) Ruby Gary V. (Pasadena CA), High capacity disk storage system having unusually high fault tolerance level and bandpass.
    상세보기
  14. Stallmo David C. (Boulder CO), Logical partitioning of a redundant array storage system.
    상세보기
  15. Young Mark S. (Mountain View CA) Drew John (Los Gatos CA) Shebanow Michael C. (Berkeley CA), Method and apparatus for error detection and correction in systems comprising floppy and/or hard disk drives.
    상세보기
  16. Farr William (Framingham MA), Method and apparatus for improved disk access.
    상세보기
  17. Potter David (Acton MA) Provost Laurence N. (Arlington MA) Baron John M. (Grafton MA) Stefanovic David (Allston MA) Sharakan Eric D. (Brighton MA) Sheppard David A. (Cambridge MA) Isman Marshall A. (, Method and apparatus for operating multi-unit array of memories.
    상세보기
  18. Gajjar Kumar (San Jose CA) Nguyen Anh (Sunnyvale CA), Method and circuit for programmable selecting a variable sequence of element using write-back.
    상세보기
  19. Timsit Claude (Mareil FRX), Method of recording in a disk memory and disk memory system.
    상세보기
  20. Timsit Claude (Mareil FRX), Method of recording in a disk memory and disk memory system.
    상세보기
  21. Stallmo David C. (Boulder CO) Brant William A. (Boulder CO) Gordon David (Boulder CO), On-line restoration of redundancy information in a redundant array system.
    상세보기
  22. Bultman David L. (Simi Valley CA) Fung Anthony (Granada Hills CA), Parallel drive array storage system.
    상세보기
  23. Clark Brian E. (Rochester MN) Lawlor Francis D. (Saugerties NY) Schmidt-Stumpf Werner E. (Patterson NY) Stewart Terrence J. (Rochester MN) Timms ; Jr. George D. (Rochester MN), Parity spreading to enhance storage access.
    상세보기
  24. Takemae Yoshihiro (Tokyo JPX), Semiconductor memory device having error correction function and incorporating redundancy configuration.
    상세보기
  25. Brant William A. (Boulder CO) Stallmo David C. (Boulder CO) Walker Mark (Los Gatos CA) Lui Albert (San Jose CA), Storage device array architecture with copyback cache.
    상세보기
  26. Stallmo David C. (Boulder CO) Brant William A. (Boulder CO), Storage device array architecture with copyback cache.
    상세보기
  27. Ouchi ; Norman Ken, System for recovering data stored in failed memory unit.
    상세보기
  28. White Barry B. (Boulder CO), Virtual storage system and method.
    상세보기

이 특허를 인용한 특허 (37)

  1. Lu, Guangming, Adaptive error correction codes for data storage systems.
    상세보기
  2. Lu, Guangming, Adaptive error correction codes for data storage systems.
    상세보기
  3. Hetzler, Steven Robert; Smith, Daniel Felix, Autonomic parity exchange.
    상세보기
  4. Hetzler, Steven Robert; Smith, Daniel Felix, Autonomic parity exchange.
    상세보기
  5. Hetzler,Steven Robert; Smith,Daniel Felix, Autonomic parity exchange.
    상세보기
  6. Liu, Juan; de Kleer, Johan; Kuhn, Lukas D., Computationally efficient tiered inference for multiple fault diagnosis.
    상세보기
  7. Kimmel, Jeffrey S.; Pafford, Randy; Sundaram, Rajesh, Concurrent content management and wear optimization for a non-volatile solid-state cache.
    상세보기
  8. Kimmel, Jeffrey S.; Pafford, Randy; Sundaram, Rajesh, Concurrent content management and wear optimization for a non-volatile solid-state cache.
    상세보기
  9. Park,Kee; Chu,Scott Yu Fan, Content addressable memory (CAM) arrays having memory cells therein with different susceptibilities to soft errors.
    상세보기
  10. Lien, Chuen-Der; Park, Kee; Wu, Chau-Chin; Baumann, Mark, Content addressable memory (CAM) devices having error detection and correction control circuits therein and methods of operating same.
    상세보기
  11. Branth,Kenneth; Park,Kee; Chu,Scott Yu Fan; Diede,Thomas, Content addressable memory (CAM) devices having multi-block error detection logic and entry selective error correction logic therein.
    상세보기
  12. Lien,Chuen Der; Miller,Michael; Wu,Chau Chin; Park,Kee; Chu,Scott Yu Fan, Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same.
    상세보기
  13. Park, Kee; Lien, Chuen-Der, Content addressable memory (CAM) devices with dual-function check bit cells that support column redundancy and check bit cells with reduced susceptibility to soft errors.
    상세보기
  14. Argyres, Dimitri, Content addressable memory array having virtual ground nodes.
    상세보기
  15. Krishnamurthy, Ganesh; Argyres, Dimitri, Content addressable memory row having virtual ground and charge sharing.
    상세보기
  16. Nambu, Masaya, Data backup method and system.
    상세보기
  17. Ouchi,Norman Ken, Data recovery from multiple failed data blocks and storage units.
    상세보기
  18. Lu, Guangming; Ho, Leader; Danilak, Radoslav; Mullendore, Rodney N.; Jones, Justin; Tomlin, Andrew J., Data reliability schemes for data storage systems.
    상세보기
  19. Baek, Seung Geol; Kim, Seung Hwan; Han, Jong Hee; Koo, Duck Hoi; Son, Ik Joon, Data storage device comprising super block parity data based on page type of word line or plane.
    상세보기
  20. Kakuta,Hitoshi; Takamoto,Yoshifumi, Disk array system and its control method.
    상세보기
  21. Argyres, Dimitri, Fast quaternary content addressable memory cell.
    상세보기
  22. Dellacona,Richard, High speed information processing and mass storage system and method, particularly for information and application servers.
    상세보기
  23. Goldberg, Tomer; Matosevich, Rivka M.; Pinhas, Barak; Schreiber, Amichai, I/O performance in resilient arrays of computer storage devices.
    상세보기
  24. Lee, Jung-bae, Integrated circuit memory devices having error checking and correction circuits therein and methods of operating same.
    상세보기
  25. Santeler,Paul A.; Jansen,Kenneth A.; Olarig,Sompong P., Main memory controller adapted to correct corrupted data by xoring corrupted data to directly generate correct data.
    상세보기
  26. Hollberg, Ulf; Gessinger, Winfried; Spencer, Ian, Method and system for consistent updates of redundant data in relational databases.
    상세보기
  27. Garani, Shayan S.; Anderson, Kent D.; Krishnan, Anantha Raman; Lu, Guangming; Dahandeh, Shafa; Tomlin, Andrew J., Method and system for monitoring data channel to enable use of dynamically adjustable LDPC coding parameters in a data storage system.
    상세보기
  28. Danilak, Radoslav; Mullendore, Rodney N.; Jones, Justin; Tomlin, Andrew J., Methods, solid state drive controllers and data storage devices having a runtime variable raid protection scheme.
    상세보기
  29. Aston, Christopher J.; Laker, Mark Stephen; Willis, Trevor E.; Berrington, Neil; Dorey, Martin A.; Garbagnati, Carlo F.; Shottan, Shmuel, Multi-tiered filesystem.
    상세보기
  30. Aston, Christopher J.; Laker, Mark Stephen; Willis, Trevor E.; Berrington, Neil; Dorey, Martin A.; Garbagnati, Carlo F.; Shottan, Shmuel, Multi-tiered filesystem.
    상세보기
  31. Argyres, Dimitri, Quaternary content addressable memory cell having one transistor pull-down stack.
    상세보기
  32. Hetzler,Steven Robert; Smith,Daniel Felix; Winograd,Shmuel, Raid 3+3.
    상세보기
  33. Thorpe, Roger T.; Brenes, Erasmo; O'Neil, Stephen; Shen, Alec, Storage controller redundancy using bi-directional reflective memory channel.
    상세보기
  34. Thorpe,Roger T.; Brenes,Erasmo; O'Neil,Stephen; Shen,Alec, Storage controller redundancy using bi-directional reflective memory channel.
    상세보기
  35. Argyres, Dimitri, Ternary content addressable memory cell having single transistor pull-down stack.
    상세보기
  36. Argyres, Dimitri, Ternary content addressable memory cell having two transistor pull-down stack.
    상세보기
  37. Ellard, Daniel J.; Vassef, Hooman, Use of write allocation decisions to achieve desired levels of wear across a set of redundant solid-state memory devices.
    상세보기

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