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Electronic devices with composite atomic barrier film and process for making same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/58
출원번호 US-0137088 (1998-08-20)
발명자 / 주소
  • Stumborg Michael F.
  • Santiago Francisco
  • Chu Tak Kin
  • Boulais Kevin A.
출원인 / 주소
  • The United States of America as represented by the Secretary of the Navy
대리인 / 주소
    Bechtel, Esq.
인용정보 피인용 횟수 : 89  인용 특허 : 32

초록

A semiconductor device having a barrier film comprising an extremely thin film formed of one or more monolayers each comprised of a two-dimensional array of metal atoms, in which more than one type of metal atom is provided in barrier film. In one exemplary aspect, the barrier film is used for preve

대표청구항

[ What is claimed is:] [2.]2. A semiconductor device comprisinga substrate;a barrier film, on said substrate, having a first monolayer consisting of a first type of metal atoms selected from the group consisting of barium atoms, strontium atoms, cesium atoms, and rubidium atoms, and a second monolay

이 특허에 인용된 특허 (32)

  1. Santiago Francisco ; Chu Tak Kin, BaF.sub.2 /GaAs electronic components.
  2. Lim Sheldon C. P. (Sunnyvale CA) Chu Stanley C. (Cupertino CA), Barrier layer enhancement in metallization scheme for semiconductor device fabrication.
  3. Hung Liang-Sun (Webster NY) Tang Ching Wan (Rochester NY), Bilayer electrode on a n-type semiconductor.
  4. Himpsel Franz J. (Mt. Kisco NY), Epitaxy of high TC superconductors on silicon.
  5. Nakamura Takashi (Kyoto JPX), Ferroelectric field effect transistor with fluoride buffer and IV-VI ferroelectric.
  6. Eizenberg Moshe (Kiryat-Ata NJ ILX) Murarka Shyam P. (New Providence NJ), Forming low-resistance contact to silicon.
  7. Childs Timothy T. (Minnetonka MN) Nohava Thomas (Apple Valley MN), GaAs heterostructure metal-insulator-semiconductor integrated circuit technology.
  8. Heremans Joseph P. (Troy MI) Partin Dale L. (Sterling Heights MI), Hot electron transistors.
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  13. Kim Jun K. (Seoul KRX) Lee Kyung I. (Seoul KRX), Method for forming a copper metal wiring with aluminum containing oxidation barrier.
  14. Cho Chih-Chen, Method for the growth of epitaxial metal-insulator-metal-semiconductor structures.
  15. Summerfelt Scott R. (Dallas TX) Reid Jason (Pasadena CA) Nicolet Marc (Pasadena CA) Kolawa Elzbieta (Sierra Madre CA), Method of forming conductive noble-metal-insulator-alloy barrier layer for high-dielectric-constant material electrodes.
  16. Nishioka Yasushiro (Tsukuba TX JPX) Summerfelt Scott R. (Dallas TX) Park Kyung-Ho (Tsukuba JPX) Bhattacharya Pijush (Midnapur INX), Method of forming high-dielectric-constant material electrodes comprising sidewall spacers.
  17. Choi Kyeong Keun (Ichonkun KRX), Method of forming metal interconnection layer of semiconductor device.
  18. Morar John F. (Mahopac NY) Tromp Rudolf M. (Mount Kisco NY), Methods for forming epitaxial self-aligned calcium silicide contacts and structures.
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  24. Gelatos Avgerinos V. (Austin TX) Fiordalice Robert W. (Austin TX), Process for forming copper interconnect structure.
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  29. Chin Maw-Rong (Huntington Beach CA) Warren Gary (Huntington Beach CA) Liao Kuan-Yang (Laguna Niguel CA), Self-aligned contact diffusion barrier method.
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