$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Process for forming a semiconductor device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/31
출원번호 US-0383238 (1999-08-26)
발명자 / 주소
  • Tobin Philip J.
  • Hegde Rama I.
  • Tseng Hsing-Huang
  • O'Meara David
  • Wang Victor
출원인 / 주소
  • Motorola, Inc.
대리인 / 주소
    Meyer
인용정보 피인용 횟수 : 26  인용 특허 : 23

초록 ▼

A method for forming an oxynitride gate dielectric layer (202, 204) begins by providing a semiconductor substrate (200). This semiconductor substrate is cleaned via process steps (10-28). Optional nitridation and oxidation are performed via steps (50 and 60) to form a thin interface layer (202). Bul

대표청구항 ▼

[ What is claimed is:] [1.]1. A method for forming a gate dielectric, the method comprising:loading a semiconductor substrate into a processing chamber of a processing tool;sealing the processing tool to form a seal;forming a dielectric region containing nitrogen and having a dielectric constant of

이 특허에 인용된 특허 (23)

  1. Kawamura Takao (17-11 ; Takakura-dai 1-chome Sakai-shi ; Osaka JPX) Iwano Hideaki (Kagoshima JPX) Miyamoto Naooki (Kagoshima JPX) Nishiguchi Yasuo (Kagoshima JPX), Electrophotographic sensitive member with amorphous Si barrier layer.
    상세보기
  2. Nakato Tatsuo (Vancouver WA), Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices.
    상세보기
  3. Schmitt Jerome J. (265 College St. (12N) New Haven CT 06510), Method and apparatus for the deposition of solid films of a material from a jet stream entraining the gaseous phase of s.
    상세보기
  4. Ishikawa Hiraku (Tokyo JPX), Method for fabricating an oxynitride film for use in a semiconductor device.
    상세보기
  5. Aoki ; Teruaki ; Abe ; Motoaki, Method for manufacture of a semiconductor device.
    상세보기
  6. Fukuda Hisashi (Tokyo) Arajawa Tomiyuki (Tokyo JPX), Method of forming a nitrided silicon dioxide (SiOxNy) film.
    상세보기
  7. Schmitt ; III Jerome J. (New Haven CT) Halpern Bret L. (Bethany CT), Microwave plasma assisted supersonic gas jet deposition of thin film materials.
    상세보기
  8. Kauffman Ralph ; Lee Roger, Nonvolatile floating gate memory with improved interploy dielectric.
    상세보기
  9. Kim Young O. (Marlboro NJ) Manchanda Lalita (Aberdeen NJ) Weber Gary R. (Whitehouse Station NJ), Oxynitride-dioxide composite gate dielectric process for MOS manufacture.
    상세보기
  10. Woo Been-Jon K. (20675 Woodward Ct. Saratoga CA 95070) Atwood Gregory (2495 Marsha Way San Jose CA 95132) Lai Stefan K. C. (2613 Lincoln Ave. Belmont CA 94002) Ong T. C. (1820 Mayall Ct. San Jose CA , Process for fabricating a flash EPROM having reduced cell size.
    상세보기
  11. Okada Yoshio (Austin TX) Tobin Philip J. (Austin TX), Process for fabricating a semiconductor device having a high reliability dielectric material.
    상세보기
  12. Zhang Hongyong (Kanagawa JPX) Ohnuma Hideto (Kanagawa JPX) Takemura Yasuhiko (Kanagawa JPX), Process for fabricating thin film transistor.
    상세보기
  13. Ito Takashi (Kawasaki JPX) Nozaki Takao (Yokohama JPX), Process for producing a semiconductor device having a silicon oxynitride insulative film.
    상세보기
  14. Sung Janmye,TWX, Reduced mask DRAM process.
    상세보기
  15. Chapple-Sokol Jonathan D. (Poughkeepsie NY) Conti Richard A. (Mount Kisco NY) Kotecki David E. (Hopewell Junction NY) Simon Andrew H. (Fishkill NY) Tejwani Manu (Yorktown Heights NY), Safe method for etching silicon dioxide.
    상세보기
  16. Matsushita Takeshi (Sagamihara JPX) Hayashi Hisao (Atsugi JPX) Aoki Teruaki (Tokyo JPX) Yamoto Hisayoshi (Hatano JPX) Kawana Yoshiyuki (Atsugi JPX), Semiconductor device having oxygen doped polycrystalline passivation layer.
    상세보기
  17. Saitoh Manzoh (Tokyo JPX) Okamura Kenji (Tokyo JPX), Semiconductor device having polycrystalline silicon resistor.
    상세보기
  18. Yamazaki Kouji (Tokyo JPX) Gomi Hideki (Tokyo JPX), Semiconductor device having silicon oxynitride film with improved moisture resistance.
    상세보기
  19. Sakamoto Mitsuru (Tokyo JPX), Semiconductor integrated circuit device having improved trench isolation.
    상세보기
  20. Ping Er-Xang (Boise ID) Thakur Randhir P. S. (Boise ID), Semiconductor processing method of making a hemispherical grain (HSG) polysilicon layer.
    상세보기
  21. Kaloyeros Alain E. ; Arkles Barry C., Silicon nitrogen-based films and method of making the same.
    상세보기
  22. Kaganowicz Grzegorz (Belle Mead NJ) Enstrom Ronald E. (Skillman NJ) Robinson John W. (Levittown PA), Silicon oxynitride passivated semiconductor body and method of making same.
    상세보기
  23. Kaya Cetin (Dallas TX) Tigelaar Howard L. (Allen TX), Split metal plate capacitor and method for making the same.
    상세보기

이 특허를 인용한 특허 (26)

  1. Halliyal,Arvind; Ramsbey,Mark T.; Shiraiwa,Hidehiko; Yang,Jean Y., Integrated ONO processing for semiconductor devices using in-situ steam generation (ISSG) process.
    상세보기
  2. Polishchuk, Igor; Levy, Sagy Charel; Ramkumar, Krishnaswamy, Memory transistor with multiple charge storing layers and a high work function gate electrode.
    상세보기
  3. Polishchuk, Igor; Levy, Sagy Charel; Ramkumar, Krishnaswamy, Memory transistor with multiple charge storing layers and a high work function gate electrode.
    상세보기
  4. Mouli, Chandra, Memory with carbon-containing silicon channel.
    상세보기
  5. Mouli, Chandra, Method for fabricating stacked non-volatile memory with silicon carbide-based amorphous silicon thin film transistors.
    상세보기
  6. Balasubramanyam, Karanam; Biesemans, Serge; Park, Byeongju, Method for forming an electronic device.
    상세보기
  7. Gousev, Evgeni; Ajmera, Atul C.; D'Emic, Christopher P., Method for forming heavy nitrogen-doped ultra thin oxynitride gate dielectrics.
    상세보기
  8. Ramkumar, Krishnaswamy; Byun, Jeong; Levy, Sagy, Method of fabricating a nonvolatile charge trap memory device.
    상세보기
  9. Ramkumar, Krishnaswamy; Levy, Sagy; Byun, Jeong, Method of fabricating a nonvolatile charge trap memory device.
    상세보기
  10. Yang, Michael X.; Ho, Henry; Chen, Steven A., Method of forming a film in a chamber and positioning a substitute in a chamber.
    상세보기
  11. Cheng, Juing-Yi; Lee, T. L.; Chen, Chia Lin, Method of forming nitrogen enriched gate dielectric with low effective oxide thickness.
    상세보기
  12. Ramkumar, Krishnaswamy, Method of integrating a charge-trapping gate stack into a CMOS flow.
    상세보기
  13. Bertrand, Jacques; Ngo, Minh Van, Nickel silicide process using starved silicon diffusion barrier.
    상세보기
  14. Levy, Sagy Charel; Ramkumar, Krishnaswamy; Jenne, Fredrick B.; Geha, Sam G., Oxide-nitride-oxide stack having multiple oxynitride layers.
    상세보기
  15. Levy, Sagy; Ramkumar, Krishnaswamy; Jenne, Fredrick; Geha, Sam, Oxide-nitride-oxide stack having multiple oxynitride layers.
    상세보기
  16. Levy, Sagy, Oxynitride bilayer formed using a precursor inducing a high charge trap density in a top layer of the bilayer.
    상세보기
  17. Roizin,Yakov; Aloni,Efraim; Gutman,Micha; Vofsy,Menachem; Ben Gigi,Avi, Protection against in-process charging in silicon-oxide-nitride-oxide-silicon (SONOS) memories.
    상세보기
  18. Ramkumar, Krishnaswamy, Radical oxidation process for fabricating a nonvolatile charge trap memory device.
    상세보기
  19. Ramkumar, Krishnaswamy; Levy, Sagy Charel; Byun, Jeong Soo, Radical oxidation process for fabricating a nonvolatile charge trap memory device.
    상세보기
  20. Ramkumar, Krishnaswamy; Levy, Sagy; Byun, Jeong, Radical oxidation process for fabricating a nonvolatile charge trap memory device.
    상세보기
  21. Jenne, Fred; Lancaster, Loren Thomas, Semiconductor device having silicon-rich layer and method of manufacturing such a device.
    상세보기
  22. Ramkumar, Krishnaswamy; Levy, Sagy, Sequential deposition and anneal of a dielectic layer in a charge trapping memory device.
    상세보기
  23. Paul R. Besser ; Minh Van Ngo ; Christy Mei-Chu Woo ; George Jonathan Kluth, Silicon-starved nitride spacer deposition.
    상세보기
  24. Mouli, Chandra, Stacked non-volatile memory with silicon carbide-based amorphous silicon finFETs.
    상세보기
  25. Mouli,Chandra, Stacked non-volatile memory with silicon carbide-based amorphous silicon thin film transistors.
    상세보기
  26. Kane, Terence; Fischer, Lawrence S.; Herschbein, Steven B.; Hong, Ying; Tenney, Michael P., Structure and method for charge sensitive electrical devices.
    상세보기

관련 콘텐츠

문의처: helpdesk@kisti.re.kr전화: 080-969-4114

Copyright KISTI. All Rights Reserved.

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로