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Flexible clock and data recovery module for a DWDM optical communication system with multiple clock rates

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04L-007/00
  • H03D-001/00
  • H04D-007/02
출원번호 US-0098410 (1998-06-16)
발명자 / 주소
  • Huang Shouhua
  • Goldberg Bar-Giora
출원인 / 주소
  • Sorrento Networks Corporation
대리인 / 주소
    Fulbright & Jaworski LLP
인용정보 피인용 횟수 : 7  인용 특허 : 144

초록

A Clock timing and Data Recovery (CDR) circuit for reconstructing a clock signal from a high speed data signal that contains no clock signal, such as data in a Non-Return-to-Zero format, and is particularly suitable for high data rate optical communication systems. The circuit uses a reference clock

대표청구항

[ What is claimed is:] [1.]1. A clock data recovery circuit, comprising:a reference clock circuit having a reference clock output for producing at least one reference clock frequency;a receive data circuit havinga receive data input for receiving an input data signal,a delay element having a delay e

이 특허에 인용된 특허 (144)

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