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Method and apparatus for electroless plating a contact pad

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 US-0256548 (1999-02-24)
발명자 / 주소
  • Jiang Tongbi
  • Li Li
출원인 / 주소
  • Micron Technology, Inc.
대리인 / 주소
    Knobbe, Martens, Olson & Bear LLP
인용정보 피인용 횟수 : 52  인용 특허 : 24

초록

A method and apparatus is disclosed for sequential processing of integrated circuits, particularly for conductively passivating a contact pad with a material which resists formation of resistive oxides. In particular, a tank is divided into three compartments, each holding a different solution: a lo

대표청구항

[ We claim:] [1.]1. A method for plating a conductive layer in an integrated circuit, comprising:immersing the integrated circuit in a cleaning fluid comprising a reducing agent that etches oxide from the conductive layer; andtransferring the integrated circuit from the cleaning fluid to a separate

이 특허에 인용된 특허 (24)

  1. Gulla Michael (Millis MA), Additive plating process.
  2. Schuierer Manfred (Michelstadt DT), Apparatus for applying a film of liquid to a web of material.
  3. Hosoda Yasushi (Amagasaki JPX) Kimoto Masanari (Kobe JPX) Hikino Shinya (Wakayama JPX) Yoshida Tsutomu (Amagasaki JPX) Fukui Kiyoyuki (Kobe JPX), Composite zinc- or zinc alloy-electroplated metal sheet and method for the production thereof.
  4. Krulik Gerald (Laguna Hills CA) Davis Stephen C. (Long Beach CA) Davison John B. (Mission Viejo CA), Copper bath for electroless plating having excess counter-cation and process using same.
  5. Feldstein Nathan (63 Hemlock Cir. Princeton NJ 08540), Dispersions for activating non-conductors for electroless plating.
  6. St. Angelo David A. (Lowell MA) Bottari Frank J. (Acton MA) Dube Christopher E. (Arlington MA), Electrical contacts and methods of manufacturing same.
  7. Lytle William H. (Chandler AZ) Olsen Dennis R. (Scottsdale AZ), Electroless plating of portions of semiconductor devices and the like.
  8. Nakaso Akishi (Oyama JPX) Oginuma Kaoru (Mito JPX) Shimazaki Takeshi (Hitachi JPX) Takahashi Akio (Shimodate JPX), Electroless plating process.
  9. Goldberg Robert L. (Sharon MA), Electroplating process.
  10. Jaye ; Jr. Frederick O. (819 Crossroads Dr. Houston TX 77079), Galvanizing apparatus.
  11. Fukazawa Yuji,JPX ; Nakajima Takahito,JPX ; Takase Kazuhiko,JPX, Method for cleaning semiconductor wafers.
  12. Yih Pay, Method for electroplating of micron particulates with metal coatings.
  13. Higgins ; III Leo M. (Austin TX), Method for forming conductive bumps on a semiconductor device.
  14. Rothschild Bill F. (Anaheim CA) Troup Sue (Calabasas CA), Method for plating on titanium.
  15. Lin Kwang-Lung (Tainan TWX) Lee Chwan-Ying (Tainan TWX), Method for producing electroless barrier layer and solder bump on chip.
  16. Konicek Jiri K. (Lund SW), Method for the production of material for printed circuits.
  17. Cork Dale J. (Elgin IL) Pellman ; deceased Russell (late of West Dundee IL by Marguerite Pellman ; executrix), Method of and apparatus for producing asphalt saturated fiberboard.
  18. Henry ; Russell Alger ; Summers ; Ernest Moreland, Method of obtaining electroless nickel coated filled epoxy resin article.
  19. Maeda Masahiko (Tokyo JPX) Fuzitani Kenzi (Kanagawa JPX) Moteki Yoshihiro (Oita JPX), Molded product having printed circuit board.
  20. Lashmore David S. (Frederick MD) Kelley David (Martinsburg WV), Process for electrodepositing metal and metal alloys on tungsten, molybdenum and other difficult to plate metals.
  21. Silbermann Joseph (Old Bridge NJ) Burchill Michael T. (Cranbury NJ), Process for surface modification of polymer articles.
  22. Yamamoto Mitsuhiko,JPX, Semiconductor device having interconnect lines and connection electrodes formed in groove portions of an insulating laye.
  23. Petrecca Peter J. (Atlanta GA), Thermoplastic melting and dispensing apparatus.
  24. Hupe Jurgen (Langenfeld DEX) Kronenberg Walter (Cologne DEX), Through-hole plated printed circuit board and process for manufacturing same.

이 특허를 인용한 특허 (52)

  1. Wang, Chang-Gong; Shero, Eric; Wilk, Glen, ALD of metal silicate films.
  2. Wang, Chang-Gong; Shero, Eric; Wilk, Glen, ALD of metal silicate films.
  3. Derderian, Garo J.; Sandhu, Gurtej Singh, Atomic layer deposition and conversion.
  4. Derderian, Garo J.; Sandhu, Gurtej Singh, Atomic layer deposition and conversion.
  5. Ahn, Kie Y.; Forbes, Leonard, Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer.
  6. Li, Dong, Deposition of ruthenium or ruthenium dioxide.
  7. Jiang,Tongbi; Li,Li, Device having contact pad with a conductive layer and a conductive passivation layer.
  8. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
  9. Sandhu, Gurtej S.; Durcan, D. Mark, Devices with nanocrystals and methods of formation.
  10. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Doped metal germanide and methods for making the same.
  11. Wang, Chang-Gong; Shero, Eric, Doping with ALD technology.
  12. Ahn,Kie Y.; Forbes,Leonard, Electronic apparatus with deposited dielectric layers.
  13. Haukka, Suvi P.; Tuominen, Marko J.; Rahtu, Antti, Enhanced deposition of noble metals.
  14. Haukka, Suvi P.; Tuominen, Marko J.; Rahtu, Antti, Enhanced deposition of noble metals.
  15. Haukka, Suvi P.; Tuominen, Marko J.; Rahtu, Antti, Enhanced deposition of noble metals.
  16. Ahn, Kie Y.; Forbes, Leonard, HfAlOfilms for gate dielectrics.
  17. Sophie, Auguste J. L.; Sprey, Hessel; Soininen, Pekka J.; Elers, Kai-Erik, In situ reduction of copper oxide prior to silicon carbide deposition.
  18. Forbes, Leonard; Ahn, Kie Y., Memory utilizing oxide nanolaminates.
  19. Forbes, Leonard; Ahn, Kie Y., Memory utilizing oxide nanolaminates.
  20. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Metal silicide, metal germanide, methods for making the same.
  21. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Metal silicide, metal germanide, methods for making the same.
  22. Shinriki, Hiroshi; Jeong, Daekyun, Method for forming Ta-Ru liner layer for Cu wiring.
  23. Shinriki, Hiroshi; Namba, Kunitoshi; Jeong, Daekyun, Method for forming metal film by ALD using beta-diketone metal complex.
  24. Ahn,Kie Y.; Forbes,Leonard, Method including forming gate dielectrics having multiple lanthanide oxide layers.
  25. Park, Hyung Sang, Method of depositing Ru films having high density.
  26. Kostamo, Juhana; Soininen, Pekka J.; Elers, Kai-Erik; Haukka, Suvi, Method of growing electrical conductors.
  27. Kostamo,Juhana; Soininen,Pekka J.; Elers,Kai Erik; Haukka,Suvi, Method of growing electrical conductors.
  28. Kostamo,Juhana; Stokhof,Maarten, Method of growing electrical conductors.
  29. Soininen, Pekka J.; Elers, Kai-Erik; Haukka, Suvi, Method of growing electrical conductors.
  30. Haukka, Suvi; Huotari, Hannu, Method of producing thin films.
  31. Kolics, Artur, Methods and materials for anchoring gapfill metals.
  32. Kolics, Artur, Methods and materials for anchoring gapfill metals.
  33. Ahn, Kie Y.; Forbes, Leonard, Methods for atomic-layer deposition.
  34. Ahn,Kie Y.; Forbes,Leonard, Methods for atomic-layer deposition of aluminum oxides in integrated circuits.
  35. Pore, Viljami J.; Haukka, Suvi P.; Blomberg, Tom E.; Tois, Eva E., Methods for depositing nickel films and for making nickel silicide and nickel germanide.
  36. Huotari, Hannu A.; Haukka, Suvi P., Methods for forming carbon nanotubes.
  37. Huotari, Hannu; Haukka, Suvi, Methods for forming roughened surfaces and applications thereof.
  38. Huotari,Hannu; Haukka,Suvi, Methods for forming roughened surfaces and applications thereof.
  39. Kim, Jong Su; Park, Hyung Sang, Methods of depositing a ruthenium film.
  40. Woodruff, Jacob Huffman, Methods of forming metal silicides.
  41. Woodruff, Jacob Huffman, Methods of forming metal silicides.
  42. Ahn, Kie Y., Methods, systems, and apparatus for uniform chemical-vapor depositions.
  43. Ahn,Kie Y., Methods, systems, and apparatus for uniform chemical-vapor depositions.
  44. Raisanen, Petri; Marcus, Steven, Plasma-enhanced deposition process for forming a metal oxide thin film and related structures.
  45. Shinriki, Hiroshi; Inoue, Hiroaki, Ruthenium alloy film for copper interconnects.
  46. Huotari, Hannu; Tuominen, Marko; Leinikka, Miika, Selective deposition of noble metal thin films.
  47. Huotari, Hannu; Tuominen, Marko; Leinikka, Miika, Selective deposition of noble metal thin films.
  48. Huotari, Hannu; Tuominen, Marko; Leinikka, Miika, Selective deposition of noble metal thin films.
  49. Huotari, Hannu; Tuominen, Marko; Leinikka, Miika, Selective deposition of noble metal thin films.
  50. Padhi,Deenesh; Gandikota,Srinivas; Naik,Mehul; Parikh,Suketu A.; Dixit,Girish A., Selective metal encapsulation schemes.
  51. Ahn, Kie Y.; Forbes, Leonard, Systems with a gate dielectric having multiple lanthanide oxide layers.
  52. Forbes, Leonard; Cloud, Eugene H.; Ahn, Kie Y., Transmission lines for CMOS integrated circuits.
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