$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Method for manufacturing bonded wafer and bonded wafer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/34
출원번호 US-0350143 (1999-07-09)
우선권정보 JP0195955 (1998-07-10)
발명자 / 주소
  • Yokokawa Isao,JPX
  • Mitani Kiyoshi,JPX
출원인 / 주소
  • Shin-Etsu Handotai Co., Ltd., JPX
대리인 / 주소
    Greenblum & Bernstein, P.L.C.
인용정보 피인용 횟수 : 41  인용 특허 : 5

초록

The object of the invention is to provide a bonded wafer in which an inferior bonding state of the bonded wafer attained by a hydrogen ion delamination method is reduced, no separation or no void is found at the connecting interface under a superior production characteristic and in a low cost. In a

대표청구항

[ What is claimed is:] [1.]1. A method for manufacturing a bonded wafer by a hydrogen ion delamination method, comprising having a carbon concentration at close contacted surfaces of both wafers of 5.times.10.sup.14 atoms/cm.sup.2 or less.

이 특허에 인용된 특허 (5)

  1. Henley Francois J. ; Cheung Nathan W., Gettering technique for silicon-on-insulator wafers.
  2. Inoue Shunsuke,JPX ; Miyawaki Mamoru,JPX ; Fukumoto Yoshihiko,JPX, Method for manufacturing semiconductor substrate.
  3. Ito Tatsuo (Niigata JPX) Nakazato Yasuaki (Nagano JPX), Method for production of bonded wafer.
  4. Sakaguchi Kiyofumi,JPX ; Yonehara Takao,JPX, Process for producing semiconductor article.
  5. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.

이 특허를 인용한 특허 (41)

  1. Cattet, Sébastien; Cattet-Guerrini, legal representative, Guillaume; Guerrini, legal representative, Lise; Ben Mohamed, Nadia; Scarfogliere, Benjamin, Controlled temperature implantation.
  2. Yamazaki, Shunpei, Display device, method for manufacturing display device, and SOI substrate.
  3. Yamazaki, Shunpei, Display device, method for manufacturing display device, and SOI substrate.
  4. Yamazaki, Shunpei, Light-emitting device.
  5. Yamazaki, Shunpei, Light-emitting device including color filter and black matrix.
  6. Sekiguchi, Keiichi; Hanaoka, Kazuya; Ito, Daigo, Manufacturing method of SOI substrate.
  7. Tanaka, Koichiro, Manufacturing method of semiconductor substrate.
  8. Tsukamoto, Akira, Manufacturing method of solid-state image sensor.
  9. Tsukamoto, Akira, Manufacturing method of solid-state image sensor.
  10. Komatsu, Yoshihiro; Moriwaka, Tomoaki; Takahashi, Kojiro, Method for forming SOI substrate and apparatus for forming the same.
  11. Csutak, Sebastian M.; Fowler, Burt W., Method for forming a semiconductor device for detecting light.
  12. Shimomura, Akihisa; Tokunaga, Hajime, Method for manufacturing SOI substrate.
  13. Morita, Etsuro; Endo, Akihiko, Method for manufacturing SOI wafer.
  14. Tanaka, Koichiro, Method for manufacturing semiconductor device.
  15. Yamazaki, Shunpei, Method for manufacturing semiconductor substrate, and semiconductor device.
  16. Yamazaki, Shunpei, Method for manufacturing semiconductor substrate, and semiconductor device.
  17. Maleville,Christophe; Maunand Tussot,Corinne, Method for preparing a bonding surface of a semiconductor layer of a wafer.
  18. Aga, Hiroji; Tate, Naoto; Kuwabara, Susumu; Mitani, Kiyoshi, Method for producing SOI wafer and SOI wafer.
  19. Aga,Hiroji; Tate,Naota; Kuwabara,Susumu; Mitani,Kiyoshi, Method for producing SOI wafer and SOI wafer.
  20. Timothy Daryl Stanley ; Peter Stanley, Method for producing SOI wafers by delamination.
  21. Nakano, Masatake; Yokokawa, Isao; Mitani, Kiyoshi, Method for producing bonded wafer and bonded wafer.
  22. Maleville,Christophe; Letertre,Fabrice; Maurice,Thibaut; Mazure,Carlos; Metral,Fred챕ric, Method for recycling a substrate.
  23. Kerdiles, Sébastien; Michel, Willy; Schwarzenbach, Walter; Delprat, Daniel; Ben Mohamed, Nadia, Method of bonding two substrates.
  24. Morimoto, Nobuyuki; Endo, Akihiko, Method of manufacturing bonded wafer.
  25. Maunand Tussot, Corinne; Maleville, Christophe; Moriceau, Hubert; Soubie, Alain, Methods for preparing a bonding surface of a semiconductor wafer.
  26. Abe, Takao; Takei, Tokio; Okabe, Keiichi; Miyajima, Hajime, Production method for silicon wafer and SOI wafer, and SOI wafer.
  27. Yamazaki, Shunpei; Ohnuma, Hideto, SOI substrate and method for manufacturing SOI substrate.
  28. Yamazaki, Shunpei; Togawa, Maki; Arai, Yasuyuki, SOI substrate and method for manufacturing SOI substrate.
  29. Yamazaki, Shunpei; Togawa, Maki; Arai, Yasuyuki, SOI substrate and method for manufacturing SOI substrate.
  30. Ohnuma, Hideto; Kakehata, Tetsuya; Iikubo, Yoichi, SOI substrate, method for manufacturing the same, and semiconductor device.
  31. Ohnuma, Hideto; Kakehata, Tetsuya; Iikubo, Yoichi, SOI substrate, method for manufacturing the same, and semiconductor device.
  32. Ohnuma, Hideto; Kakehata, Tetsuya; Iikubo, Yoichi, SOI substrate, method for manufacturing the same, and semiconductor device.
  33. Aga, Hiroji; Mitani, Kiyoshi, SOI wafer and method for producing the same.
  34. Gadkaree,Kishor Purushottam, Semiconductor on glass insulator made using improved ion implantation process.
  35. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
  36. Cherekdjian, Sarko, Semiconductor structure made using improved multiple ion implantation process.
  37. Cherekdjian, Sarko, Semiconductor structure made using improved pseudo-simultaneous multiple ion implantation process.
  38. Cherekdjian, Sarko, Semiconductor structure made using improved simultaneous multiple ion implantation process.
  39. Doyle, Brian S., Thin film using non-thermal techniques.
  40. Coletti,St챕phane; Duquennoy Pont,V챕ronique, Treatment of semiconductor wafers.
  41. Kim, Jung-ho; Bae, Dae-lok; Lee, Jong-wook; Choi, Seung-woo; Kang, Pil-kyu, Wafer temporary bonding method using silicon direct bonding.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로