초록

The present invention relates to an improved method for forming a UBM pad and solder bump connection for a flip chip which eliminates at least two mask steps required in standard UBM pad forming processes when repatterning the bond pad locations.

대표청구항 ▼

[ What is claimed is:] [1.]1. A semiconductor device, said semiconductor device comprising:a semiconductor substrate including a plurality of circuits thereon, each circuit of said plurality of circuits connected to a bond pad, a first passivation layer thereon covering said plurality of circuits an

[ What is claimed is:] [1.]1. A semiconductor device, said semiconductor device comprising:a semiconductor substrate including a plurality of circuits thereon, each circuit of said plurality of circuits connected to a bond pad, a first passivation layer thereon covering said plurality of circuits and having an aperture therethrough located at each bond pad, metallization forming a plurality of solder wettable conductive traces, each trace of said plurality of solder wettable conductive traces having a portion thereof connected to a bond pad and located on a portion of the first passivation layer, a second insulative passivation layer covering said plurality of solder wettable conductive traces and the portion of the first passivation layer, said second insulative passivation layer including a plurality of sloped-wall vias therethrough located over the portion of said each of said plurality of solder wettable conductive traces, and a solder material located in each sloped-wall vias of said plurality of sloped-wall vias via in said second insulative passivation layer, said solder material directly contacting the portion of at least one solder wettable conductive trace of said plurality of solder wettable conductive traces, said at least one sloped wall via of said plurality of sloped-wall vias including:the portion of the at least one solder wettable conductive trace of said plurality of solder wettable conductive traces directly contacting said solder material, said at least one solder wettable conductive trace of said plurality of solder wettable conductive traces in electrical communication with integrated circuitry carried by said semiconductor substrate connected to at least one circuit of said plurality of circuits.