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Ceramic composite wiring structures for semiconductor devices and method of manufacture 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/06
  • H01L-023/10
  • H01L-023/15
출원번호 US-0344682 (1999-06-25)
발명자 / 주소
  • deRochemont L. Pierre
  • Farmer Peter H.
출원인 / 주소
  • deRochemont
  • L. Pierre
대리인 / 주소
    Perkins, Smith & Cohen, LLPCohen
인용정보 피인용 횟수 : 29  인용 특허 : 71

초록

A composite wiring structure (10) for use with at least one semiconductor device (16). The composite wiring structure having a first conductive member (12) upon which the semiconductor device can be mounted for electrical connection thereto. A dielectric member (20), made of ceramic or organo-cerami

대표청구항

[ We claim:] [1.]1. A composite structure for management of electrical and thermal conduction from at least one semiconductor device, comprising:a composite, with at least one electrical conductor forming a portion of an electrical network and at least one thermal conductor forming a part of a therm

이 특허에 인용된 특허 (71)

  1. Horiguchi Akihiro (Yokohama JPX) Kasori Mituo (Kawasaki JPX) Ueno Fumio (Kawasaki JPX) Sato Hideki (Yokohama JPX) Mizunoya Nobuyuki (Yokohama JPX) Endo Mitsuyoshi (Yamato JPX) Tanaka Shun-ichiro (Yok, Aluminum nitride sintered body having conductive metallized layer.
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  45. Jin Sungho (Millington NJ) Tiefel Thomas H. (North Plainfield NJ), Method of making a ribbon-like or sheet-like superconducting oxide composite body.
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  65. Tanaka Osamu (Kyoto JPX), Structure and method for mounting semiconductor device.
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  70. Kuris ; Arthur, Ultrasonic inlaid article.
  71. Bone Robert (Laguna Niguel CA) Vora Kirti (Irvine CA), Vertical IC chip stack with discrete chip carriers formed from dielectric tape.

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  10. Beer, Gottfried; Bergmann, Robert; Hong, Heng Wan Jenny, Electronic component having a semiconductor chip, system carrier, and methods for producing the electronic component and the semiconductor chip.
  11. de Rochemont, L. Pierre, Frequency-selective dipole antennas.
  12. de Rochemont, L. Pierre, Frequency-selective dipole antennas.
  13. de Rochemont, L. Pierre, Hybrid computing module.
  14. de Rochemont, L. Pierre, Hybrid computing module.
  15. de Rochemont, L. Pierre, Liquid chemical deposition apparatus and process and products therefrom.
  16. de Rochemont, L. Pierre; Kovacs, Alexander J., Liquid chemical deposition apparatus and process and products therefrom.
  17. Kung, Moriss; Ho, Kwun-Yao, Metal post manufacturing method.
  18. Mazzochette,Joseph; Tormey,Ellen Schwartz; Thaler,Barry Jay, Method and structures for enhanced temperature control of high power components on multilayer LTCC and LTCC-M boards.
  19. de Rochemont, L. Pierre, Monolithic DC/DC power management module with surface FET.
  20. de Rochemont, L. Pierre, Photovoltaic devices with silicon dioxide encapsulation layer and method to make same.
  21. de Rochemont, L. Pierre, Power FET with a resonant transistor gate.
  22. deRochemont, L. Pierre, Power management module and method of manufacture.
  23. de Rochemont, L. Pierre, R.F. energy collection circuit for wireless devices.
  24. de Rochemont, L. Pierre, R.F. energy collection circuit for wireless devices.
  25. de Rochemont, L. Pierre, Semiconductor carrier with vertical power FET module.
  26. de Rochemont, L. Pierre, Semiconductor carrier with vertical power FET module.
  27. de Rochemont, L. Pierre, Semiconductor chip carriers with monolithically integrated quantum dot devices and method of manufacture thereof.
  28. Mikubo, Kazuyuki; Kitajo, Sakae; Shimada, Yuzo, Semiconductor device packaging structure.
  29. Teysseyre, Jerome; Manatad, Romel; Wu, Chung-Lin; Dosdos, Bigildis; Almagro, Erwin Ian; Estacio, Maria Cristina, Vertical and horizontal circuit assemblies.
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