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Interconnect assemblies and methods including ancillary electronic component connected in immediate proximity of semiconductor device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-007/02
출원번호 US-0114589 (1998-07-13)
발명자 / 주소
  • Khandros Igor Y.
  • Pedersen David V.
  • Eldridge Benjamin N.
  • Roy Richard S.
  • Mathieu Gaetan
출원인 / 주소
  • FormFactor, Inc.
대리인 / 주소
    Blakely, Sokoloff, Taylor & Zafman
인용정보 피인용 횟수 : 128  인용 특허 : 23

초록

The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provid

대표청구항

[ What is claimed is:] [1.]1. A semiconductor device with an ancillary electronic component comprising:a semiconductor device including a first connection to a first electrical line and a second connection to a second electrical line; andan ancillary electronic component connected directly to a die

이 특허에 인용된 특허 (23)

  1. Little Michael J. (Woodland Hills CA) Grinberg Jan (Los Angeles CA) Garvin Hugh L. (Malibu CA), 3-D integrated circuit assembly employing discrete chips.
  2. Ahmad Umar M. ; Atwood Eugene R., Bare die multiple dies for direct attach.
  3. Hernandez Jorge M. (Mesa AZ) Gilderdale Aleta (Chandler AZ), Decoupling capacitor for surface mounted leadless chip carriers, surface mounted leaded chip carriers and Pin Grid Array.
  4. Hunt James W. (P.O. Box 489 Edna TX 77957), Device for assembling interlocking road mat segments for temporary roads.
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  6. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  7. Yoneda Takehiko (Miyazaki JPX) Yoshimoto Masahiro (Miyazaki JPX) Takayama Yoshihiko (Miyazaki JPX) Tsujhi Tetsjhi (Miyazaki JPX) Taki Hiromitsu (Miyazaki JPX), Face-mounting type module substrate attached to base substrate face to face.
  8. Fox ; III Angus C. (Boise ID) Farnworth Warren M. (Nampa ID), High-density electronic package comprising stacked sub-modules which are electrically interconnected by solder-filled vi.
  9. Saito Takashi,JPX ; Tanaka Kouji,JPX, High-modulus iron-based alloy with a dispersed boride.
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  12. Pfizenmayer Henry L. (Phoenix AZ), Mount for supporting a high frequency transformer in a hybrid module.
  13. Tuckerman David B. (Dublin CA), Multichip module having SiO2 insulating layer.
  14. Fujita Suguru (Tokyo JPX) Takahashi Kazuaki (Kawasaki JPX) Sagawa Morikazu (Tama JPX) Sakai Hiroyuki (Katano JPX) Ota Yorito (Kobe JPX) Inoue Kaoru (Kadoma JPX), Multilayer microstrip wiring board with a semiconductor device mounted thereon via bumps.
  15. Gupta Debabrata (Scottsdale AZ) Drye James E. (Mesa AZ), Multiple integrated circuit module which simplifies handling and testing.
  16. Pai Deepak K. (Burnsville MN) Krinke Terrance A. (Roseville MN), Plated compliant lead.
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  18. Otsuka Kanji (Higashiyamato JPX) Kato Masao (Hadano JPX) Kumagai Takashi (Isehara JPX) Usami Mitsuo (Ohme JPX) Kuroda Shigeo (Ohme JPX) Sahara Kunizo (Nishitama JPX) Yamada Takeo (Koganei JPX) Miyamo, Semiconductor device having leads for mounting to a surface of a printed circuit board.
  19. Adachi Chinatsu (Minou JPX) Nishijima Masaaki (Moriguchi JPX) Ota Yorito (Kobe JPX) Ishikawa Osamu (Kyoto JPX), Semiconductor device including a first chip having an active element and a second chip having a passive element.
  20. Yamamoto Kazumichi (Hachioji JPX) Nakanishi Keiichirou (Tokyo PA JPX) Yasunaga Moritoshi (Pittsburgh PA) Saitoh Tatsuya (Kokubunji JPX) Shibata Katsunari (Kokubunji JPX) Yamada Minoru (Hanno JPX) Mas, Semiconductor integrated circuit device and computer system using the same.
  21. Purdom Gregory W. ; Berecz Endre M., Stacked memory for flight recorders.
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