초록 ▼

The present invention describes an interposer which improves the thermal performance of a semiconductor device. The interposer may be situated between a substrate and a board. The interposer is attached to two layers of solder balls. The first layer of solder balls electrically and mechanically conn

The present invention describes an interposer which improves the thermal performance of a semiconductor device. The interposer may be situated between a substrate and a board. The interposer is attached to two layers of solder balls. The first layer of solder balls electrically and mechanically connects the interposer to the substrate. The second layer of solder balls electrically and mechanically connects the interposer to the board. In one aspect, the coefficient of thermal expansion (CTE) of the interposer may be flexibly selected to reduce thermal strain-induced stress for either or both layers of solder balls resulting from thermal performance differences between the substrate and the interposer or the interposer and the board. In another aspect, the CTE of the interposer may be reduced to allow a lower CTE for the substrate, which in turn may reduce thermal strain-induced stress for solder balls between the substrate and a die attached to the substrate. Advantageously, the improved thermal performance of the present invention may allow larger substrates, larger dies, larger solder ball arrays, reduced solder ball pitches and pin counts well above conventional levels without compromising semiconductor device reliability.

대표청구항 ▼

1. A semiconductor package, comprising:a packaging substrate including a ceramic material; a die mechanically bound to said packaging substrate and in electrical communication with said packaging substrate; an interposer mechanically bound and in electrical communication with said packaging substrat

1. A semiconductor package, comprising:a packaging substrate including a ceramic material; a die mechanically bound to said packaging substrate and in electrical communication with said packaging substrate; an interposer mechanically bound and in electrical communication with said packaging substrate, said interposer including an array of conductive links traversing from a first face of said interposer to a second face of said interposer; and an underfill material deposited at least partially between said packaging substrate and said interposer.