IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0637255
(2000-08-11)
|
우선권정보 |
JP-0144715 (1998-05-26) |
발명자
/ 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
30 인용 특허 :
8 |
초록
▼
In a multilayer wiring structure, a plurality of wiring layers (9, 11, 13) are formed on an inorganic lowermost insulating film (2) formed on a silicon substrate (1), and organic interlayer insulating films (14, 15, 16, 17, 18) are interposed between the respective adjacent wiring layers. Via metal
In a multilayer wiring structure, a plurality of wiring layers (9, 11, 13) are formed on an inorganic lowermost insulating film (2) formed on a silicon substrate (1), and organic interlayer insulating films (14, 15, 16, 17, 18) are interposed between the respective adjacent wiring layers. Via metal (8, 10, 12) are formed in the inorganic lowermost insulating film (2) and the organic interlayer insulating films (15, 17), and openings having the shape corresponding to an electrode pad are formed in the organic interlayer insulating films (14, 15, 16, 17, 18), and these openings are filled with metal material to form metal film patterns (3, 4, 6, 5, 7), whereby the electrode pad is constructed as the laminate body of the metal film patterns (3, 4, 6, 5, 7). Accordingly, even when organic material having a low dielectric constant is used for the interlayer insulating films, durability of an electrode portion to impacts in a bonding process is enhanced, and both of reduction in parasitic capacitance and enhancement in strength of the electrode portion can be achieved.
대표청구항
▼
1. A method of manufacturing a multilayer wiring structure including a plurality of wiring layers formed on a lowermost insulating film formed on a substrate, with an interlayer insulating film interposed between respective adjacent wiring layers of the plurality of wiring layers so as to insulate t
1. A method of manufacturing a multilayer wiring structure including a plurality of wiring layers formed on a lowermost insulating film formed on a substrate, with an interlayer insulating film interposed between respective adjacent wiring layers of the plurality of wiring layers so as to insulate the respective adjacent wiring layers from each other and an electrode pad connected to a wiring of at least one of said plurality of wiring layers, said method comprising:repeatedly forming one of (a) an opening having a shape corresponding to the shape of said electrode pad in the interlayer insulating film and filling conductive material into the opening to form a conductive film pattern, and (b) a conductive film pattern having the shape corresponding to the electrode pad and filling the interlayer insulating film in a portion around the conductive film pattern to form plural layers of conductive film patterns, forming said electrode pad as a laminate body of the conductive film patterns of the plural layers; and the formation of respective wiring layers is performed simultaneously with the formation of any one of said conductive film patterns of said plural layers.
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