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Performance monitoring in a NUMA computer 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/00
출원번호 US-0282626 (1999-03-31)
발명자 / 주소
  • Bishop Chapman Brock
  • Eli Chiprout
  • Elmootazbellah Nabil Elnozahy
  • David Brian Glasco
  • Ramakrishnan Rajamony
  • Freeman Leigh Rawson, III
  • Ronald Lynn Rockhold
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Joseph P. Lally
인용정보 피인용 횟수 : 62  인용 특허 : 10

초록

A performance monitor for a computer system that includes an interface, a filter module, and an address mapping module. The interface is suitable for coupling to an interconnect network of the computer system. The interconnect network links a local node of the system with at least one remote node of

대표청구항

1. A performance monitor, comprising:an interface suitable for coupling to an interconnect network of a computer system, the interconnect network linking a local node of the computer with at least one remote node of the computer system, wherein the interface unit is configured to extract a physical

이 특허에 인용된 특허 (10)

  1. Seymour Leslie G. (Barrington IL), Distributed computer system with network and resource status monitoring.
  2. Pulsipher Eric A. ; Smith Darren D. ; Ruffatto Dominic L., Distributed internet monitoring system and method.
  3. Schwaller Peter James ; Walker ; II John Quillian ; Joyce Steven Thomas ; Huntley Timothy Scott, Endpoint node systems computer program products for application traffic based communications network performance testing.
  4. Schwaller Peter James ; Walker II John Quillian ; Joyce Steven Thomas ; Huntley Timothy Scott, Methods, systems and computer program products for endpoint pair based communications network performance testing.
  5. Schwaller Peter James ; Walker ; II John Quillian ; Joyce Steven Thomas ; Huntley Timothy Scott, Methods, systems and computer program products for test scenario based communications network performance testing.
  6. Beaven Paul A. (Romsey GB3), Performance and status monitoring in a computer network.
  7. Notess Peter C. (Fort Collins CO), Storage and display of historical LAN traffic statistics.
  8. Talluri Madhusudhan ; Pease Marshall C., System and method for message transmission between network nodes using remote wires.
  9. Schwaller Peter James ; Walker ; II John Quillian ; Joyce Steven Thomas ; Huntley Timothy Scott, Systems, methods and computer program products for applications traffic based communications network performance testing.
  10. Rangarajan Govindarajan ; Huo Chaoying, Using objects to discover network information about a remote network having a different network protocol.

이 특허를 인용한 특허 (62)

  1. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  2. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  3. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  4. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  5. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  6. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  7. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  8. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogenous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  9. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive processor for performing an operation with simple and complex units each comprising configurably interconnected heterogeneous elements.
  10. English, Donald W., Adaptive, wireless automatic identification system pilot port interface.
  11. Master, Paul L.; Uvacek, Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  12. Master, Paul L.; Uvacek, Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  13. Master,Paul L.; Uvacek,Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  14. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  15. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  16. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  17. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having fixed, application specific computational elements.
  18. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements.
  19. Brown,Jeffrey Douglas; Krolak,David John; Ruedinger,Jeffrey Joseph; Clark,Scott Douglas, Bus interface controller for determining access counts.
  20. Heidari, Ghobad; Chang, Kuor Hsin; Master, Paul L.; Hogenauer, Eugene B.; Scheuermann, Walter James, Communications module, device, and method for implementing a system acquisition function.
  21. Master, Paul L.; Watson, John, Configurable hardware based digital imaging apparatus.
  22. Scheuermann, W. James; Hogenauer, Eugene B., Control node for multi-core system.
  23. Li, Yinan; Lohman, Guy M.; Mueller, Rene; Pandis, Ippokratis; Raman, Vijayshankar, Data shuffling in a non-uniform memory access device.
  24. Li, Yinan; Lohman, Guy M.; Mueller, Rene; Pandis, Ippokratis; Raman, Vijayshankar, Data shuffling in a non-uniform memory access device.
  25. Li, Yinan; Lohman, Guy M.; Mueller, Rene; Pandis, Ippokratis; Raman, Vijayshankar, Data shuffling in a non-uniform memory access device.
  26. Bishop Chapman Brock ; Eli Chiprout ; Elmootazbellah Nabil Elnozahy ; David Brian Glasco ; Ramakrishnan Rajamony ; Freeman Leigh Rawson, III ; Ronald Lynn Rockhold, Efficient identification of candidate pages and dynamic response in a NUMA computer.
  27. Furtek, Frederick Curtis; Master, Paul L., External memory controller.
  28. Furtek, Frederick Curtis; Master, Paul L., External memory controller node.
  29. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
  30. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
  31. Scheuermann,Walter James, Hardware implementation of the secure hash standard.
  32. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  33. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  34. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  35. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  36. Flinsbaugh, Jack, High performance system and method having a local bus and a global bus.
  37. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  38. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  39. Sambhwani,Sharad; Heidari,Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  40. Chagoly, Bryan Christopher; Emuchay, Nduwuisi, Method and apparatus for exposing monitoring violations to the monitored application.
  41. Wyman,Blair, Method and apparatus for monitoring processes in a non-uniform memory access (NUMA) computer system.
  42. Master, Paul L., Method and system for achieving individualized protected space in an operating system.
  43. Master, Paul L., Method and system for creating and programming an adaptive computing engine.
  44. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  45. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  46. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  47. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  48. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  49. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  50. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  51. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  52. Master,Paul L.; Hogenauer,Eugene; Wu,Bicheng William; Chuang,Dan MingLun; Freeman Benson,Bjorn, Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information.
  53. Civlin,Jan, Methods and hardware for safe memory allocation in arbitrary program environments.
  54. Podowski, Robert R., Monitoring of software operation for improving computer program performance.
  55. Wyman, Blair, Monitoring processes in a non-uniform memory access (NUMA) computer system.
  56. Christodorescu, Mihai; Salajegheh, Mastooreh; Gupta, Rajarshi; Islam, Nayeem, Optimization of hardware monitoring for computing devices.
  57. Wise,Ashley K.; Bjur,David A., Performance monitor for data processing systems.
  58. Master, Paul L., Profiling of software and circuit designs utilizing data operation analyses.
  59. Master,Paul L.; Watson,John, Storage and delivery of device features.
  60. Master, Paul L.; Watson, John, System for adapting device standards after manufacture.
  61. Master, Paul L.; Watson, John, System for authorizing functionality in adaptable hardware devices.
  62. Katragadda, Ramana; Spoltore, Paul; Howard, Ric, Task definition for specifying resource requirements.
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