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Electronic devices with a barrier film and process for making same

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
출원번호 US-0137083 (1998-08-20)
발명자 / 주소
  • Michael F. Stumborg
  • Francisco Santiago
  • Tak Kin Chu
  • Kevin A. Boulais
출원인 / 주소
  • The United States of America as represented by the Secretary of the Navy
대리인 / 주소
    James B. Bechtel, Esq.
인용정보 피인용 횟수 : 14  인용 특허 : 57

초록

A semiconductor device having a barrier film comprising an extremely thin film formed of one or more monolayers each comprised of a two-dimensional array of metal atoms. In one exemplary aspect, the barrier film is used for preventing the diffusion of atoms of another material, such as a copper cond

대표청구항

1. A semiconductor device comprising:a substrate; a substantially continuous barrier film on said substrate, said barrier film comprising a monolayer, wherein said monolayer is comprised of metal atoms only, and wherein said barrier film has a thickness of not more than approximately 20 .ANG.; and a

이 특허에 인용된 특허 (57)

  1. Kimock Fred M. (Macungie PA) Knapp Bradley J. (Allentown PA) Finke Steven J. (Kutztown PA), Abrasion wear resistant coated substrate product.
  2. Hines Horace H. (San Jose CA) Walsh Brian J. (Danville CA) Koops Ronald (San Leandro CA) Jones Steven M. (Pleasanton CA), Apparatus and method for automatic tracking of a zoomed scan area in a medical camera system.
  3. Santiago Francisco ; Chu Tak Kin, BaF.sub.2 /GaAs electronic components.
  4. Lim Sheldon C. P. (Sunnyvale CA) Chu Stanley C. (Cupertino CA), Barrier layer enhancement in metallization scheme for semiconductor device fabrication.
  5. Hung Liang-Sun (Webster NY) Tang Ching Wan (Rochester NY), Bilayer electrode on a n-type semiconductor.
  6. Kao Yung-Chung (Dallas TX) Celii Francis G. (Dallas TX), Compound semiconductors and a method for thin film growth.
  7. Gardner Mark I. ; Hause Fred N., Copper-containing plug for connection of semiconductor surface with overlying conductor.
  8. Chen Liang ; Guo Ted ; Chen Fusen ; Mosely Roderick C., Deposition film orientation and reflectivity improvement using a self-aligning ultra-thin layer.
  9. Ohmi Tadahiro (1-17-301 ; Komegakubo 2-chome Aoba-ku ; Sendai-shi ; Miyagi-ken 980 JPX), Electronic device provided with metal fluoride film.
  10. Stumborg Michael F. ; Santiago Francisco ; Chu Tak Kin ; Boulais Kevin A., Electronic devices with strontium barrier film and process for making same.
  11. Stumborg Michael F. ; Santiago Francisco ; Chu Tak Kin ; Boulais Kevin A., Electronic devices with strontium barrier film and process for making same.
  12. Jones Gary W., Emissive display using organic light emitting diodes.
  13. Himpsel Franz J. (Mt. Kisco NY), Epitaxy of high TC superconductors on silicon.
  14. Eizenberg Moshe (Kiryat-Ata NJ ILX) Murarka Shyam P. (New Providence NJ), Forming low-resistance contact to silicon.
  15. Childs Timothy T. (Minnetonka MN) Nohava Thomas (Apple Valley MN), GaAs heterostructure metal-insulator-semiconductor integrated circuit technology.
  16. Takada Jun (Kasugai JPX) Yamaguchi Minori (Akashi JPX) Tawada Yoshihisa (Kobe JPX), Heat-resistant thin film photoelectric converter.
  17. Heremans Joseph P. (Troy MI) Partin Dale L. (Sterling Heights MI), Hot electron transistors.
  18. Chen Liang-Yuh ; Naik Mehul ; Guo Ted ; Mosely Roderick Craig, Integrated CVD/PVD Al planarization using ultra-thin nucleation layers.
  19. Mitchell Douglas G. ; Carney Francis J. ; Woolsey Eric J., Interconnect system and method of fabrication.
  20. Tsang Won-Tien (New Providence NJ), MOS Devices.
  21. Joshi Rajiv V. (Yorktown Heights NY) Oh Choon-Sik (Seoul CT KRX) Moy Dan (Bethel CT), MOSFET with a refractory metal film, a silicide film and a nitride film formed on and in contact with a source, drain an.
  22. Kirlin Peter S. (Bethel CT) Brown Duncan W. (Wilton CT) Gardiner Robin A. (Bethel CT), Metal complex source reagents for MOCVD.
  23. Kao Yung-Chung (Dallas TX) Celii Francis G. (Dallas TX), Method for controlling thin film growth of compound semiconductors using mass spectrometer detectors.
  24. Choi Kyeong K. (Ichonshi KRX), Method for fabricating a diffusion barrier metal layer in a semiconductor device.
  25. Kim Jun K. (Seoul KRX) Lee Kyung I. (Seoul KRX), Method for forming a copper metal wiring with aluminum containing oxidation barrier.
  26. Ohba Takayuki (Yokohama JPX), Method for manufacturing semiconductor device.
  27. New Daryl C., Method for oxidation and crystallization of ferroelectric material.
  28. Cho Chih-Chen, Method for the growth of epitaxial metal-insulator-metal-semiconductor structures.
  29. Kirlin Peter S. (Brookfield CT) Brown Duncan W. (Wilton CT) Gardiner Robin A. (Bethel CT), Method of forming a superconducting oxide layer by MOCVD.
  30. Summerfelt Scott R. (Dallas TX) Reid Jason (Pasadena CA) Nicolet Marc (Pasadena CA) Kolawa Elzbieta (Sierra Madre CA), Method of forming conductive noble-metal-insulator-alloy barrier layer for high-dielectric-constant material electrodes.
  31. Welsch Gerhard E. (2514 Edgehill Rd. Cleveland Hts. OH 44106), Method of forming high temperature barriers in structural metals to make such metals creep resistant at high homologous.
  32. Nishioka Yasushiro (Tsukuba TX JPX) Summerfelt Scott R. (Dallas TX) Park Kyung-Ho (Tsukuba JPX) Bhattacharya Pijush (Midnapur INX), Method of forming high-dielectric-constant material electrodes comprising sidewall spacers.
  33. Choi Kyeong Keun (Ichonkun KRX), Method of forming metal interconnection layer of semiconductor device.
  34. Noda, Minoru, Method of making asymmetrical field effect transistor.
  35. Inoue Yoji,JPX ; Tanaka Katsu,JPX ; Okamoto Shinji,JPX ; Kobayashi Kikuo,JPX, Method of manufacturing ternary compound thin films.
  36. Morar John F. (Mahopac NY) Tromp Rudolf M. (Mount Kisco NY), Methods for forming epitaxial self-aligned calcium silicide contacts and structures.
  37. Milano, Raymond A., Multilayer modulation doped heterostructure charge coupled device.
  38. Huang Yuan-Chang (Hsin-Chu TWX) Chang Kuang-Hui (Hsin-Chu TWX), Post contact layer etch back process which prevents precipitate formation.
  39. Ye Yan ; Ma Diana Xiaobing, Process for copper etch back.
  40. McKee Rodney A. (Kingston TN) Walker Frederick J. (Oak Ridge TN), Process for depositing an oxide epitaxially onto a silicon substrate and structures prepared with the process.
  41. McKee Rodney A. (Kingston TN) Walker Frederick J. (Oak Ridge TN), Process for depositing epitaxial alkaline earth oxide onto a substrate and structures prepared with the process.
  42. Sun Shi-Chung (Taipei TWX) Chiu Hien-Tien (Taipei TWX) Tsai Ming-Hsing (Chiayi TWX), Process for fabricating tantalum nitride diffusion barrier for copper matallization.
  43. Gelatos Avgerinos V. (Austin TX) Fiordalice Robert W. (Austin TX), Process for forming copper interconnect structure.
  44. Santiago Francisco (Elkridge MD) Chu Tak K. (Bethesda MD) Stumborg Michael F. (Bethesda MD), Process for forming epitaxial BaF2 on GaAs.
  45. Santiago Francisco (Elkridge MD) Chu Tak-Kin (Bethesda MD) Stumborg Michael (Rockville MD), Process for forming epitaxial BaF2 on GaAs.
  46. Stumborg Michael F. ; Santiago Francisco ; Chu Tak Kin ; Boulais Kevin A., Process for making a semiconductor device with barrier film formation using a metal halide and products thereof.
  47. Hadermann Albert F. (Ijamsville MD) Waters Paul F. (Washington DC) Trippe Jerry C. (Fairfax Station VA), Process for making finely divided solids.
  48. Gilton Terry L. (Boise ID) Tuttle Mark E. (Boise ID) Cathey David A (Boise ID), Process for metallizing integrated circuits with electrolytically-deposited copper.
  49. Schacham-Diamand Yosef ; Dubin Valery M. ; Ting Chiu H. ; Zhao Bin ; Vasudev Prahalad K. ; Desilva Melvin, Protected encapsulation of catalytic layer for electroless copper interconnect.
  50. Clark Marion D. (11725 Montana Ave. Los Angeles CA 90049) Anderson C. Lawrence (4409 Henley Ct. Westlake Village CA 91360), Schottky barrier charge coupled device (CCD) manufacture.
  51. Chin Maw-Rong (Huntington Beach CA) Warren Gary (Huntington Beach CA) Liao Kuan-Yang (Laguna Niguel CA), Self-aligned contact diffusion barrier method.
  52. Koubuchi Yasushi (Hitachi JPX) Onuki Jin (Hitachi JPX) Koizumi Masahiro (Hitachi JPX), Semiconductor device.
  53. Lee Sang-in (Suwon KRX), Semiconductor device and method for manufacturing the same.
  54. Cho Chih-Chen (Richardson TX), Semiconductor-on-insulator structure and method for producing same.
  55. Kirlin Peter S. (Brookfield CT) Brown Duncan W. (Wilton CT) Gardiner Robin A. (Bethel CT), Source reagent compounds for MOCVD of refractory films containing group IIA elements.
  56. Young Peter L. (South Barrington IL) Cech Jay (Elmhurst IL) Li Kin (Lombard IL), Thin-film electrical connections for integrated circuits.
  57. Dubin Valery M. (Cupertino CA) Schacham-Diamand Yosi (Ithaca NY) Zhao Bin (Irvine CA) Vasudev Prahalad K. (Austin TX) Ting Chiu H. (Saratoga CA), Use of cobalt tungsten phosphide as a barrier material for copper metallization.

이 특허를 인용한 특허 (14)

  1. Ramaswamy, Nirmal; Marsh, Eugene; Drewes, Joel, Atomic layer deposition systems and methods including silicon-containing tantalum precursor compounds.
  2. Stumborg, Michael F.; Santiago, Francisco; Chu, Tak Kin; Boulais, Kevin A., Electronic devices with cesium barrier film and process for making same.
  3. Stumborg, Michael F.; Santiago, Francisco; Chu, Tak Kin; Boulais, Kevin A., Electronic devices with composite atomic barrier film and process for making same.
  4. You, Lu; Buynoski, Matthew S.; Besser, Paul R.; Romero, Jeremias D.; Wang, Pin-Chin Connie; Tran, Minh Q., Method of forming a metal or metal nitride interface layer between silicon nitride and copper.
  5. Higashi, Kazuyuki; Takase, Tamao; Shibata, Hideki, Semiconductor device manufacturing method including forming step of SOI structure and semiconductor device having SOI structure.
  6. Tommie W. Kelley ; Dawn V. Muyres ; Mark J. Pellerite ; Timothy D. Dunbar ; Larry D. Boardman ; Terrance P. Smith, Surface modifying layers for organic thin film transistors.
  7. Vaartstra, Brian A., Systems and methods for forming refractory metal nitride layers using disilazanes.
  8. Vaartstra, Brian A., Systems and methods for forming refractory metal nitride layers using organic amines.
  9. Vaartstra,Brian A., Systems and methods for forming tantalum silicide layers.
  10. Vaartstra, Brian A., Systems and methods of forming refractory metal nitride layers using disilazanes.
  11. Vaartstra,Brian A., Systems and methods of forming refractory metal nitride layers using disilazanes.
  12. Vaartstra,Brian A., Systems and methods of forming refractory metal nitride layers using disilazanes.
  13. Vaartstra, Brian A., Systems and methods of forming refractory metal nitride layers using organic amines.
  14. Vaartstra,Brian A., Systems and methods of forming refractory metal nitride layers using organic amines.
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