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Method for optimizing communication speed between processors 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
출원번호 US-0169038 (1998-10-09)
발명자 / 주소
  • Peter C. Bradley
출원인 / 주소
  • United Technologies Corporation
인용정보 피인용 횟수 : 63  인용 특허 : 11

초록

A method is disclosed for selecting from among a plurality of computer processors connected together to distribute portions of an overall numerical problem to be solved among the processors to optimize the speed of communication between the processors in solving the overall problem. The method utili

대표청구항

1. A method of distributing a plurality of portions of a numerical problem to be solved among a corresponding plurality of computer processors for optimizing the speed of communication of data between the computer processors when solving the numerical problem, the computer processors being connected

이 특허에 인용된 특허 (11)

  1. Kumar Manoj, Algorithm for fault tolerant routing in benes networks.
  2. Ludwiczak Karen M. (Holmdel NJ) Martz Louis M. (Rumson NJ) Wilson Patricia Hart (Red Bank NJ), Arrangement for dynamically deriving a telephone network management database from telephone network data.
  3. Tan Min P. (Torrance CA) Fuh Eric (Irvine CA) Chan ; deceased Philip (late of Placentia CA by Anna Chan ; executrix) Ta John (Laguna Niguel CA), Communications controller utilizing an external buffer memory with plural channels between a host and network interface.
  4. Arci Francesco Davide Luigi,GB3 ; Jamieson Maurice Carnduff,GB3 ; Shuttleworth Mark Andrew,GB3, Computer system using genetic optimization techniques.
  5. Croslin William D. ; Sees Mark W. ; Voyles Perry, Dynamic network topology determination.
  6. Gupta Amar ; Naumann Joel Craig ; Price Eduard Allen ; Sathe Shrish K., Expandable communication cell bus for multiplexing and concentrating communication cell traffic onto high speed lines.
  7. Cohn John Maxwell ; Hathaway David James, Localized simulated annealing.
  8. Galand Claude,FRX ; Bidard Jean,FRX ; Chobert Jean-Paul,FRX ; Brun Gerard,FRX ; Maurel Olivier,FRX ; Ouvry Yves,FRX, Method and system for optimizing the connection set up time in high speed communication networks for recovering from network failure.
  9. Picazo ; Jr. Jose J. ; Lee Paul Kakul ; Zager Robert P., Network connector operable in bridge mode and bypass mode.
  10. Picazo ; Jr. Jose J. ; Lee Paul Kakul ; Zager Robert P., Network packet switch using shared memory for repeating and bridging packets at media rate.
  11. Hayashi Kenichi (Kawasaki JPX) Chuang Isaac Liu (Prospect KY), Reconfigurable torus network having switches between all adjacent processor elements for statically or dynamically split.

이 특허를 인용한 특허 (63)

  1. Whinnett, Nicholas William; Somerville, Fiona Clare Angharad, Accessing a base station.
  2. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  3. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  4. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  5. Ramchandran, Amit, Adaptable datapath for a digital processing system.
  6. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  7. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter J., Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  8. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  9. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive integrated circuitry with heterogenous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements.
  10. Master, Paul L.; Hogenauer, Eugene; Scheuermann, Walter James, Adaptive processor for performing an operation with simple and complex units each comprising configurably interconnected heterogeneous elements.
  11. Master, Paul L.; Uvacek, Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  12. Master, Paul L.; Uvacek, Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  13. Master,Paul L.; Uvacek,Bohumir, Apparatus and method for adaptive multimedia reception and transmission in communication environments.
  14. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  15. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  16. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
  17. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having fixed, application specific computational elements.
  18. Master, Paul L.; Smith, Stephen J.; Watson, John, Apparatus, system and method for configuration of adaptive integrated circuitry having heterogeneous computational elements.
  19. Doyle,Ronald P.; Kaminsky,David Louis, Autonomic service routing using observed resource requirement for self-optimization.
  20. Heidari, Ghobad; Chang, Kuor Hsin; Master, Paul L.; Hogenauer, Eugene B.; Scheuermann, Walter James, Communications module, device, and method for implementing a system acquisition function.
  21. Master, Paul L.; Watson, John, Configurable hardware based digital imaging apparatus.
  22. Scheuermann, W. James; Hogenauer, Eugene B., Control node for multi-core system.
  23. Furtek, Frederick Curtis; Master, Paul L., External memory controller.
  24. Furtek, Frederick Curtis; Master, Paul L., External memory controller node.
  25. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
  26. Furtek, Fredrick Curtis; Master, Paul L., External memory controller node.
  27. Whinnett, Nick; Somerville, Fiona, Femtocell access control.
  28. Whinnett, Nick; Somerville, Fiona; Smart, Christopher, Femtocell base station.
  29. Smart, Christopher Brian, Filter.
  30. Scheuermann,Walter James, Hardware implementation of the secure hash standard.
  31. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  32. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  33. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  34. Scheuermann, W. James; Hogenauer, Eugene B., Hardware task manager.
  35. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  36. Sambhwani, Sharad; Heidari, Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  37. Sambhwani,Sharad; Heidari,Ghobad, Low I/O bandwidth method and system for implementing detection and identification of scrambling codes.
  38. Whinnett, Nicholas William, Method and device in a communication network.
  39. Whinnett, Nicholas William, Method and device in a communication network.
  40. Whinnett, Nicholas William, Method and device in a communication network.
  41. Whinnett, Nicholas William, Method and device in a communication network.
  42. Master, Paul L., Method and system for achieving individualized protected space in an operating system.
  43. Master, Paul L., Method and system for creating and programming an adaptive computing engine.
  44. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  45. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  46. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  47. Plunkett, Robert T.; Heidari, Ghobad; Master, Paul L., Method and system for managing hardware resources to implement system functions using an adaptive computing architecture.
  48. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  49. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  50. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  51. Scheuermann, W. James, Method and system for reconfigurable channel coding.
  52. Master,Paul L.; Hogenauer,Eugene; Wu,Bicheng William; Chuang,Dan MingLun; Freeman Benson,Bjorn, Method, system and program for developing and scheduling adaptive integrated circuity and corresponding control or configuration information.
  53. Whinnett, Nick, Methods and devices for reducing interference in an uplink.
  54. Smart, Christopher Brian, Power control.
  55. Duller, Andrew William George, Process placement in a processor array.
  56. Claydon, Anthony Peter John; Claydon, Anne Patricia, Processor architecture with switch matrices for transferring data along buses.
  57. Master, Paul L., Profiling of software and circuit designs utilizing data operation analyses.
  58. Brooks, Mark A.; Elko, David A.; Goss, Steven N.; Jordan, Michael J.; Kurdt, Georgette L.; Nick, Jeffrey M.; Rao, Chitta L.; Surman, David H.; Jones, Steven B., Providing at least one peer connection between a plurality of coupling facilities to couple the plurality of coupling facilities.
  59. Master,Paul L.; Watson,John, Storage and delivery of device features.
  60. Butterworth, Henry Esmond; Glider, Joseph Samuel; Gomez, Juan Carlos, System and method for determining weak membership in set of computer nodes.
  61. Master, Paul L.; Watson, John, System for adapting device standards after manufacture.
  62. Master, Paul L.; Watson, John, System for authorizing functionality in adaptable hardware devices.
  63. Katragadda, Ramana; Spoltore, Paul; Howard, Ric, Task definition for specifying resource requirements.
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